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MC10H158LD PDF预览

MC10H158LD

更新时间: 2024-11-11 13:11:15
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MC10H158LD 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
The MC10H158 is a quad two channel multiplexer with common input select.  
A “high” level select enables input D00, D10, D20 and D30 and a “low” level  
select enables input D01, D11, D21 and D31. This MECL 10H part is a  
functional/pinout duplication of the standard MECL 10K family part, with 100%  
improvement in propagation delay and no increase in power–supply current.  
L SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
Propagation Delay, 1.5 ns Typical  
Power Dissipation, 197 mW Typical  
Improved Noise Margin 150 mV (Over Operating Voltage and  
Temperature Range)  
P SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
Voltage Compensated  
MECL 10K–Compatible  
FN SUFFIX  
PLCC  
CASE 775–02  
MAXIMUM RATINGS  
Characteristic  
Symbol  
Rating  
Unit  
Vdc  
Vdc  
mA  
Power Supply (V  
= 0)  
V
EE  
–8.0 to 0  
CC  
Input Voltage (V  
= 0)  
V
I
0 to V  
50  
CC  
EE  
TRUTH TABLE  
Output CurrentContinuous  
— Surge  
I
out  
Select  
D0  
X
D1  
L
Q
L
100  
L
L
Operating Temperature Range  
T
A
0 to +75  
°C  
X
H
X
H
L
Storage Temperature RangePlastic  
— Ceramic  
T
stg  
–55 to +150  
–55 to +165  
°C  
°C  
H
H
L
H
X
H
ELECTRICAL CHARACTERISTICS (V  
0°  
= –5.2 V ±5%)  
25°  
EE  
75°  
Characteristic  
Symbol Min  
Max  
Min  
Max  
Min  
Max  
Unit  
Power Supply Current  
I
53  
48  
53  
mA  
E
DIP  
PIN ASSIGNMENT  
Input Current High  
Pin 9  
Pins 3–6 and 10–13  
I
µA  
inH  
475  
515  
295  
320  
295  
320  
Q0  
Q1  
V
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC  
Input Current Low  
High Output Voltage  
Low Output Voltage  
High Input Voltage  
Low Input Voltage  
I
0.5  
0.5  
0.3  
µA  
inL  
Q2  
V
–1.02 –0.84 –0.98 –0.81 –0.92 –0.735 Vdc  
–1.95 –1.63 –1.95 –1.63 –1.95 –1.60 Vdc  
–1.17 –0.84 –1.13 –0.81 –1.07 –0.735 Vdc  
–1.95 –1.48 –1.95 –1.48 –1.95 –1.45 Vdc  
OH  
V
Q3  
OL  
D11  
D10  
D01  
D00  
NC  
V
IH  
D20  
D21  
V
IL  
AC PARAMETERS  
D30  
Propagation Delay  
Data  
Select  
t
ns  
pd  
0.5  
1.0  
1.9  
2.9  
0.5  
1.0  
1.9  
2.9  
0.5  
1.0  
2.0  
2.9  
D31  
SELECT  
V
Rise Time  
Fall Time  
NOTE:  
t
r
0.7  
0.7  
2.2  
2.2  
0.7  
0.7  
2.2  
2.2  
0.7  
0.7  
2.2  
2.2  
ns  
ns  
EE  
t
f
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion  
Tables on page 6–11 of the Motorola MECL Data  
Book (DL122/D).  
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,  
afterthermalequilibriumhasbeenestablished.Thecircuitisinatestsocketormountedonaprintedcircuit  
board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through  
a 50–ohm resistor to –2.0 volts.  
3/93  
Motorola, Inc. 1996  
REV 5  

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