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MC10H159FNR2 PDF预览

MC10H159FNR2

更新时间: 2024-11-04 05:10:23
品牌 Logo 应用领域
安森美 - ONSEMI 解复用器逻辑集成电路
页数 文件大小 规格书
7页 155K
描述
Quad 2−Input Multiplexer

MC10H159FNR2 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QLCC包装说明:PLASTIC, LCC-20
针数:20Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:7.58系列:10H
JESD-30 代码:S-PQCC-J20JESD-609代码:e0
长度:8.965 mm逻辑集成电路类型:MULTIPLEXER
功能数量:4输入次数:2
输出次数:1端子数量:20
最高工作温度:75 °C最低工作温度:
输出特性:OPEN-EMITTER输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC20,.4SQ封装形状:SQUARE
封装形式:CHIP CARRIER包装方法:TAPE AND REEL
峰值回流温度(摄氏度):240最大电源电流(ICC):58 mA
Prop。Delay @ Nom-Sup:3.2 ns传播延迟(tpd):2.2 ns
认证状态:Not Qualified座面最大高度:4.57 mm
子类别:Multiplexer/Demultiplexers表面贴装:YES
技术:ECL温度等级:COMMERCIAL EXTENDED
端子面层:Tin/Lead (Sn80Pb20)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:8.965 mm
Base Number Matches:1

MC10H159FNR2 数据手册

 浏览型号MC10H159FNR2的Datasheet PDF文件第2页浏览型号MC10H159FNR2的Datasheet PDF文件第3页浏览型号MC10H159FNR2的Datasheet PDF文件第4页浏览型号MC10H159FNR2的Datasheet PDF文件第5页浏览型号MC10H159FNR2的Datasheet PDF文件第6页浏览型号MC10H159FNR2的Datasheet PDF文件第7页 
MC10H159  
Quad 2−Input Multiplexer  
(Inverting)  
Description  
The MC10H159 is a quad 2input multiplexer with enable. This  
MECL 10Hpart is a functional/pinout duplication of the standard  
MECL 10Kfamily part, with 100% improvement in propagation  
delay and no increase in powersupply current.  
http://onsemi.com  
MARKING DIAGRAMS*  
Features  
16  
Propagation Delay, 1.5 ns Typical  
Power Dissipation, 218 mW Typical  
Improved Noise Margin 150 mV (Over Operating Voltage and  
Temperature Range)  
MC10H159L  
AWLYYWW  
1
CDIP16  
L SUFFIX  
CASE 620A  
Voltage Compensated  
MECL 10K Compatible  
PbFree Packages are Available*  
16  
1
TRUTH TABLE  
MC10H159P  
AWLYYWWG  
16  
Enable Select  
D0  
D1  
Q
1
L
L
X
L
H
PDIP16  
P SUFFIX  
CASE 648  
L
L
L
H
L
X
L
H
X
X
X
L
H
L
L
H
H
X
H
X
10H159  
ALYWG  
DIP  
SOEIAJ16  
CASE 966  
PIN ASSIGNMENT  
1 20  
Q0  
Q1  
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
Q2  
10H159G  
AWLYYWW  
20  
1
D11  
D10  
D01  
D00  
Q3  
D20  
D21  
PLLC20  
FN SUFFIX  
CASE 775  
D30  
D31  
A
= Assembly Location  
= Year  
WL, L = Wafer Lot  
YY, Y  
ENABLE  
SELECT  
V
WW, W = Work Week  
EE  
G
= PbFree Package  
Pin assignment is for DualinLine Package.  
For PLCC pin assignment, see the Pin Conversion Tables on page 18  
of the ON Semiconductor MECL Data Book (DL122/D).  
*For additional marking information, refer to  
Application Note AND8002/D.  
*For additional information on our PbFree strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
February, 2006 Rev. 7  
MC10H159/D  

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