MC100LVEL11MNR4

更新时间： 2024-01-28 19:41:06

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
8页	142K
描述
3.3V ECL 1:2 Differential Fanout Buffer

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MC100LVEL11MNR4 数据手册

MC100LVEL11

3.3VꢀECL 1:2

Differential Fanout Buffer

Description

The MC100LVEL11 is a differential 1:2 fanout buffer. The device is

functionally similar to the E111 device but with higher performance

capabilities. Having within-device skews and output transition times

significantly improved over the E111, the LVEL11 is ideally suited for

those applications which require the ultimate in AC performance.

The differential inputs of the LVEL11 employ clamping circuitry to

maintain stability under open input conditions. If the inputs are left open

http://onsemi.com

MARKING

DIAGRAMS*

(pulled to V ) the Q outputs will go LOW.

KVL11

ALYW

Features

• 330 ps Propagation Delay

• 5 ps Skew Between Outputs

• High Bandwidth Output Transitions

• The 100 Series Contains Temperature Compensation

SOIC−8

D SUFFIX

CASE 751

KV11

• PECL Mode Operating Range: V = 3.0 V to 3.8 V

ALYWG

with V = 0 V

TSSOP−8

DT SUFFIX

CASE 948R

• NECL Mode Operating Range: V = 0 V

with V = −3.0 V to −3.8 V

• Internal Input Pulldown Resistors

• Q Output will Default LOW with Inputs Open or at V

• Pb−Free Packages are Available

DFN8

MN SUFFIX

CASE 506AA

= Assembly Location

= Wafer Lot

= Year

W = Work Week

M = Date Code

= Pb−Free Package

(Note: Microdot may be in either location)

*For additional marking information, refer to

Application Note AND8002/D.

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 5 of this data sheet.

Figure 1. Logic Diagram and Pinout Assignment

Publication Order Number:

December, 2006 − Rev. 8

MC100LVEL11/D

12 3 4 5 6 7 8

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