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MC100E131FNR2G PDF预览

MC100E131FNR2G

更新时间: 2024-02-26 01:09:17
品牌 Logo 应用领域
安森美 - ONSEMI 触发器锁存器逻辑集成电路
页数 文件大小 规格书
8页 130K
描述
5V ECL 4-Bit D Flip-Flop

MC100E131FNR2G 技术参数

是否无铅:含铅是否Rohs认证:符合
生命周期:Active零件包装代码:QLCC
包装说明:QCCJ,针数:28
Reach Compliance Code:unknown风险等级:5.69
Is Samacsys:N其他特性:NECL MODE: VCC = 0V WITH VEE = -4.2V TO -5.7V
系列:100EJESD-30 代码:S-PQCC-J28
JESD-609代码:e3长度:11.505 mm
逻辑集成电路类型:D FLIP-FLOP位数:4
功能数量:1端子数量:28
最高工作温度:85 °C最低工作温度:
输出特性:OPEN-EMITTER输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):260传播延迟(tpd):0.675 ns
认证状态:COMMERCIAL座面最大高度:4.57 mm
最大供电电压 (Vsup):5.7 V最小供电电压 (Vsup):4.2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:ECL温度等级:OTHER
端子面层:MATTE TIN端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40触发器类型:POSITIVE EDGE
宽度:11.505 mm最小 fmax:1100 MHz
Base Number Matches:1

MC100E131FNR2G 数据手册

 浏览型号MC100E131FNR2G的Datasheet PDF文件第2页浏览型号MC100E131FNR2G的Datasheet PDF文件第3页浏览型号MC100E131FNR2G的Datasheet PDF文件第4页浏览型号MC100E131FNR2G的Datasheet PDF文件第5页浏览型号MC100E131FNR2G的Datasheet PDF文件第6页浏览型号MC100E131FNR2G的Datasheet PDF文件第7页 
MC10E131, MC100E131  
5VꢀECL 4-Bit D Flip-Flop  
Description  
The MC10E/100E131 is a quad master-slave D-type flip-flop with  
differential outputs. Each flip-flop may be clocked separately by  
holding Common Clock (C ) LOW and using the Clock Enable (CE)  
inputs for clocking. Common clocking is achieved by holding the CE  
C
http://onsemi.com  
inputs LOW and using C to clock all four flip-flops. In this case, the  
C
CE inputs perform the function of controlling the common clock, to  
each flip-flop.  
Individual asynchronous resets are provided (R). Asynchronous set  
controls (S) are ganged together in pairs, with the pairing chosen to  
reflect physical chip symmetry.  
Data enters the master when both C and CE are LOW, and transfers  
C
PLCC28  
FN SUFFIX  
CASE 776  
to the slave when either C or CE (or both) go HIGH.  
C
The 100 Series contains temperature compensation.  
Features  
1100 MHz Min. Toggle Frequency  
Differential Outputs  
Individual and Common Clocks  
Individual Resets (asynchronous)  
Paired Sets (asynchronous)  
MARKING DIAGRAM*  
1
PECL Mode Operating Range: V = 4.2 V to 5.7 V  
CC  
MCxxxE131G  
AWLYYWW  
with V = 0 V  
EE  
NECL Mode Operating Range: V = 0 V  
CC  
with V = 4.2 V to 5.7 V  
EE  
Metastability Time Constant is 200 ps.  
Internal Input 50 kW Pulldown Resistors  
ESD Protection: Human Body Model; > 2 kV,  
Machine Model; > 200 V  
xxx  
A
WL  
YY  
WW  
G
= 10 or 100  
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= PbFree Package  
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test  
Moisture Sensitivity Level:  
Pb = 1  
PbFree = 3  
*For additional marking information, refer to  
Application Note AND8002/D.  
For Additional Information, see Application Note AND8003/D  
Flammability Rating: UL 94 V0 @ 0.125 in,  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 6 of this data sheet.  
Oxygen Index: 28 to 34  
Transistor Count = 240 devices  
PbFree Packages are Available*  
*For additional information on our PbFree strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
November, 2006 Rev. 11  
MC10E131/D  

MC100E131FNR2G 替代型号

型号 品牌 替代类型 描述 数据表
MC100E131FNR2 ONSEMI

完全替代

5V ECL 4-Bit D Flip-Flop
MC100E131FN ONSEMI

完全替代

5V ECL 4-Bit D Flip-Flop
MC100E451FNG ONSEMI

类似代替

5V ECL 6−Bit D Register Differential Data and Clock

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