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MC100E136FNR2 PDF预览

MC100E136FNR2

更新时间: 2024-02-12 18:09:42
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安森美 - ONSEMI 计数器触发器逻辑集成电路输出元件输入元件
页数 文件大小 规格书
12页 159K
描述
5V ECL 6-Bit Universal Up/Down Counter

MC100E136FNR2 数据手册

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MC10E136, MC100E136  
5VꢀECL 6-Bit Universal  
Up/Down Counter  
Description  
The MC10E/100E136 is a 6-bit synchronous, presettable,  
cascadable universal counter. The device generates a look-ahead-carry  
output and accepts a look-ahead-carry input. These two features allow  
for the cascading of multiple E136’s for wider bit width counters that  
operate at very nearly the same frequency as the stand alone counter.  
The CLOUT output will pulse LOW for one clock cycle one count  
before the E136 reaches terminal count. The COUT output will pulse  
LOW for one clock cycle when the counter reaches terminal count.  
For more information on utilizing the look-ahead-carry features of the  
device please refer to the applications section of this data sheet. The  
differential COUT output facilitates the E136’s use in programmable  
divider and self-stopping counter applications.  
Unlike the H136 and other similar universal counter designs, the E136  
carryout and look-ahead-carryout signals are registered on chip.  
This design alleviates the glitch problem seen on many counters  
where the carry out signals are merely gated. Because of this  
architecture there are some minor functional differences between the  
E136 and H136 counters. The user, regardless of familiarity with the  
H136, should read this data sheet carefully. Note specifically (see  
logic diagram) the operation of the carry out outputs and the  
look-ahead-carry in input when utilizing the master reset.  
When left open all of the input pins will be pulled LOW via an input  
pulldown resistor. The master reset is an asynchronous signal which  
when asserted will force the Q outputs LOW.  
The Q outputs need not be terminated for the E136 to function  
properly, in fact if these outputs will not be used in a system it is  
recommended to save power and minimize noise that they be left  
open. This practice will minimize switching noise which can reduce  
the maximum count frequency of the device or significantly reduce  
margins against other noise in the system.  
http://onsemi.com  
PLCC28  
FN SUFFIX  
CASE 776  
MARKING DIAGRAM*  
1
MCxxxE136G  
AWLYYWW  
xxx  
A
WL  
YY  
WW  
G
= 10 or 100  
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= PbFree Package  
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 10 of this data sheet.  
The 100 Series contains temperature compensation.  
Features  
550 MHz Count Frequency  
Meets or Exceeds JEDEC Standard EIA/JESD78  
IC Latchup Test  
Moisture Sensitivity Level: Pb = 1; PbFree = 3  
For Additional Information, see Application Note  
AND8003/D  
Flammability Rating: UL 94 V0 @ 0.125 in,  
Oxygen Index: 28 to 34  
Transistor Count = 506 devices  
Fully Synchronous Up and Down Counting  
Look-Ahead-Carry Input and Output  
Asynchronous Master Reset  
PECL Mode Operating Range: V = 4.2 V to 5.7 V  
CC  
with V = 0 V  
EE  
NECL Mode Operating Range: V = 0 V  
CC  
with V = 4.2 V to 5.7 V  
EE  
PbFree Packages are Available*  
Internal Input 50 kW Pulldown Resistors  
ESD Protection: Human Body Model: > 2 kV,  
Machine Model: > 200 V  
*For additional information on our PbFree strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
November, 2006 Rev. 9  
MC10E136/D  

MC100E136FNR2 替代型号

型号 品牌 替代类型 描述 数据表
MC100E136FNR2G ONSEMI

完全替代

5V ECL 6-Bit Universal Up/Down Counter
MC10E136FNR2G ONSEMI

完全替代

5V ECL 6-Bit Universal Up/Down Counter
MC10E136FNG ONSEMI

完全替代

5V ECL 6-Bit Universal Up/Down Counter

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