5秒后页面跳转
捷配首页

Datasheet > 驱动程序和接口 > 线路驱动器或接收器> MAX9394EHJ
MAX9394EHJ PDF预览

MAX9394EHJ

更新时间： 2024-02-27 05:25:49
品牌 Logo 应用领域
美信 - MAXIM 解复用器
页数 文件大小 规格书
13页 361K
描述
2:1 Multiplexers and 1:2 Demultiplexers with Loopback

阅读下载

获取价格

MAX9394EHJ 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：QFN
包装说明：HVQCCN,针数：28
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.79
差分输出：YES驱动器位数：1
输入特性：DIFFERENTIAL接口集成电路类型：LINE TRANSCEIVER
接口标准：EIA-644; TIA-644JESD-30 代码：S-XQCC-N28
JESD-609代码：e0长度：5 mm
湿度敏感等级：1功能数量：1
端子数量：28最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：UNSPECIFIED
封装代码：HVQCCN封装形状：SQUARE
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度（摄氏度）：240
认证状态：Not Qualified最大接收延迟：0.72 ns
接收器位数：1座面最大高度：0.8 mm
最大供电电压：3.6 V最小供电电压：3 V
标称供电电压：3.3 V表面贴装：YES
技术：BIPOLAR温度等级：INDUSTRIAL
端子面层：TIN LEAD端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED最大传输延迟：0.72 ns
宽度：5 mmBase Number Matches：1

MAX9394EHJ 数据手册

 浏览型号MAX9394EHJ的Datasheet PDF文件第2页浏览型号MAX9394EHJ的Datasheet PDF文件第3页浏览型号MAX9394EHJ的Datasheet PDF文件第4页浏览型号MAX9394EHJ的Datasheet PDF文件第6页浏览型号MAX9394EHJ的Datasheet PDF文件第7页浏览型号MAX9394EHJ的Datasheet PDF文件第8页 
2:1 Multiplexers and 1:2 Demultiplexers with  
Loopback  
Pin Description  
PIN  
NAME  
FUNCTION  
TQFP  
QFN  
1, 2, 28  
3, 8, 18, 23  
4
1, 2, 3, 30,  
31, 32  
N.C.  
GND  
ENB  
No Connection. Not internally connected.  
4, 9, 20, 25  
Ground  
Channel B Output Enable. Drive ENB high to enable the LVDS outputs for channel B.  
An internal 435ꢀΩ resistor to GND pulls ENB low when unconnected.  
5
Channel B LVDS Noninverting Output. Connect a 100Ω termination resistor between  
OUTB and OUTB at the receiver inputs to ensure proper operation.  
6
7
5
6
OUTB  
Channel B LVDS Inverting Output. Connect a 100Ω termination resistor between  
OUTB and OUTB at the receiver inputs to ensure proper operation.  
OUTB  
Power-Supply Input. Bypass each V  
to GND with a 0.1µF and 0.01µF ceramic  
CC  
capacitor. Install both bypass capacitors as close to the device as possible, with the  
0.01µF capacitor closest to the device.  
8, 13, 24, 29  
7, 22, 27  
V
CC  
LVDS/HSTL (MAX9394) or LVPECL/CML (MAX9395) Inverting Input. An internal  
128ꢀΩ pullup resistor to V pulls the input high when unconnected (MAX9394). An  
internal 68ꢀΩ resistor to GND pulls the input low when unconnected (MAX9395).  
10  
11  
9
INB0  
CC  
LVDS/HSTL (MAX9394) or LVPECL/CML (MAX9395) Noninverting Input. An internal  
10  
INB0  
128ꢀΩ pullup resistor to V pulls the input high when unconnected (MAX9394). An  
CC  
internal 68ꢀΩ resistor to GND pulls the input low when unconnected (MAX9395).  
Loopbacꢀ Select for Channel B Output. Connect LB_SELB to GND or leave  
unconnected to reproduce the INB_ (INB_) differential inputs at OUTB (OUTB).  
12  
11  
LB_SELB  
Connect LB_SELB to V  
to loop bacꢀ the INA (INA) differential inputs to OUTB  
CC  
(OUTB). An internal 435ꢀΩ resistor to GND pulls LB_SELB low when unconnected.  
LVDS/HSTL (MAX9394) or LVPECL/CML (MAX9395) Inverting Input. An internal  
128ꢀΩ pullup resistor to V pulls the input high when unconnected (MAX9394). An  
internal 68ꢀΩ resistor to GND pulls the input low when unconnected (MAX9395).  
14  
15  
12  
13  
INB1  
CC  
LVDS/HSTL (MAX9394) or LVPECL/CML (MAX9395) Noninverting Input. An internal  
INB1  
128ꢀΩ pullup resistor to V pulls the input high when unconnected (MAX9394). An  
CC  
internal 68ꢀΩ resistor to GND pulls the input low when unconnected (MAX9395).  
Channel B Multiplexer Control Input. Selects the differential input to reproduce at the  
B channel differential output. Connect BSEL to GND or leave unconnected to select  
16  
14  
BSEL  
the INB0 (INB0) set of inputs. Connect BSEL to V  
to select the INB1 (INB1) set of  
CC  
inputs. An internal 435ꢀΩ resistor to GND pulls BSEL low when unconnected.  
Channel A1 Output Enable. Drive ENA1 high to enable the A1 LVDS outputs. An  
internal 435ꢀΩ resistor to GND pulls the ENA1 low when unconnected.  
17  
18  
19  
15  
16  
17  
ENA1  
OUTA1  
OUTA1  
Channel A1 LVDS Inverting Output. Connect a 100Ω termination resistor between  
OUTA1 and OUTA1 at the receiver inputs to ensure proper operation.  
Channel A1 LVDS Noninverting Output. Connect a 100Ω termination resistor between  
OUTA1 and OUTA1 at the receiver inputs to ensure proper operation.  
_______________________________________________________________________________________  
5
12345678...13

下载PDF

与MAX9394EHJ相关器件

型号 品牌 描述 获取价格 数据表
MAX9394EHJ+ MAXIM 2:1 Multiplexers and 1:2 Demultiplexers with Loopback

获取价格
MAX9394EHJ+T MAXIM Line Transceiver, 1 Func, 1 Driver, 1 Rcvr, BIPolar, PQFP32, 5 X 5 MM, 1 MM HEIGHT, TQFP-3

获取价格
MAX9394EHJ-T MAXIM Line Transceiver, 1 Func, 1 Driver, 1 Rcvr, BIPolar, PQFP32, 5 X 5 MM, 1 MM HEIGHT, TQFP-3

获取价格
MAX9394ETI MAXIM 2:1 Multiplexers and 1:2 Demultiplexers with Loopback

获取价格
MAX9394ETI* MAXIM 2:1 Multiplexers and 1:2 Demultiplexers with Loopback

获取价格
MAX9394ETI-T MAXIM Line Transceiver, 1 Func, 1 Driver, 1 Rcvr, BIPolar, 5 X 5 MM, 0.80 MM HEIGHT, TQFN-28

获取价格

与MAX9394EHJ相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证