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MAX9394ETI PDF预览

MAX9394ETI

更新时间: 2024-11-05 04:41:35
品牌 Logo 应用领域
美信 - MAXIM 解复用器
页数 文件大小 规格书
13页 361K
描述
2:1 Multiplexers and 1:2 Demultiplexers with Loopback

MAX9394ETI 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QFN
包装说明:5 X 5 MM, 0.80 MM HEIGHT, TQFN-28针数:28
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.79
差分输出:YES驱动器位数:1
输入特性:DIFFERENTIAL接口集成电路类型:LINE TRANSCEIVER
接口标准:EIA-644; TIA-644JESD-30 代码:S-XQCC-N28
JESD-609代码:e0长度:5 mm
湿度敏感等级:1功能数量:1
端子数量:28最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):245
认证状态:Not Qualified最大接收延迟:0.72 ns
接收器位数:1座面最大高度:0.8 mm
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:BIPOLAR温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED最大传输延迟:0.72 ns
宽度:5 mmBase Number Matches:1

MAX9394ETI 数据手册

 浏览型号MAX9394ETI的Datasheet PDF文件第2页浏览型号MAX9394ETI的Datasheet PDF文件第3页浏览型号MAX9394ETI的Datasheet PDF文件第4页浏览型号MAX9394ETI的Datasheet PDF文件第5页浏览型号MAX9394ETI的Datasheet PDF文件第6页浏览型号MAX9394ETI的Datasheet PDF文件第7页 
19-2878; Rev 0; 7/03  
2:1 Multiplexers and 1:2 Demultiplexers with  
Loopback  
General Description  
Features  
The MAX9394/MAX9395 consist of a 2:1 multiplexer  
and a 1:2 demultiplexer with loopback. The multiplexer  
section (channel B) accepts two low-voltage differential  
signaling (LVDS) inputs and generates a single LVDS  
output. The demultiplexer section (channel A) accepts  
a single LVDS input and generates two parallel LVDS  
outputs. The MAX9394/MAX9395 feature a loopback  
mode that connects the input of channel A to the output  
of channel B and connects the selected input of chan-  
nel B to the outputs of channel A.  
Guaranteed 1.5GHz Operation with 250mV  
Differential Output Swing  
Simultaneous Loopback Control  
2ps  
(max) Random Jitter  
(RMS)  
AC Specifications Guaranteed for 150mV  
Differential Input  
Signal Inputs Accept Any Differential Signaling  
Standard  
Three LVCMOS/LVTTL logic inputs control the internal  
connections between inputs and outputs, one for the  
multiplexer portion of channel B (BSEL), and the other  
two for loopback control of channels A and B (LB_SELA  
and LB_SELB). Independent enable inputs for each dif-  
ferential output pair provide additional flexibility.  
LVDS Outputs for Clock or High-Speed Data  
High-Level Input Fail-Safe Detection (MAX9394)  
Low-Level Input Fail-Safe Detection (MAX9395)  
+3.0V to +3.6V Supply Voltage Range  
LVCMOS/LVTTL Logic Inputs  
Fail-safe circuitry forces the outputs to a differential low  
condition for undriven inputs or when the common-  
mode voltage exceeds the specified range. The  
MAX9394 provides high-level input fail-safe detection  
for HSTL, LVDS, and other GND-referenced differential  
inputs. The MAX9395 provides low-level fail-safe detec-  
Ordering Information  
PART  
TEMP RANGE  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
PIN-PACKAGE  
32 TQFP  
28 Thin QFN  
32 TQFP  
MAX9394EHJ  
MAX9394ETI*  
MAX9395EHJ  
MAX9395ETI*  
tion for CML, LVPECL, and other V -referenced differ-  
CC  
ential inputs.  
Ultra low 91ps  
(max) pseudorandom bit sequence  
P-P  
28 Thin QFN  
(PRBS) jitter ensures reliable communications in high-  
speed links that are highly sensitive to timing error,  
especially those incorporating clock-and-data recovery,  
or serializers and deserializers. The high-speed switch-  
ing performance guarantees 1.5GHz operation and less  
than 87ps (max) skew between channels.  
*Future product—contact factory for availability.  
Typical Operating Circuit  
+3.0V TO  
+3.6V  
0.1µF  
= 50Ω  
0.01µF  
LVDS inputs and outputs are compatible with the  
TIA/EIA-644 LVDS standard. The LVDS outputs drive  
100loads. The MAX9394/MAX9395 are offered in 32-  
pin TQFP and 28-pin thin QFN packages and operate  
over the extended temperature range (-40°C to +85°C).  
V
CC  
Z
= 50Ω  
Z
INA  
OUTA0  
0
0
100Ω  
100Ω  
MAX9394  
MAX9395  
OUTA0  
OUTA1  
Z
Z
= 50Ω  
= 50Ω  
Z
= 50Ω  
INA  
0
0
0
LVDS  
RECEIVER  
Applications  
INB0  
INB0  
INB1  
INB1  
High-Speed Telecom/Datacom Equipment  
Central Office Backplane Clock Distribution  
DSLAM  
Z
Z
= 50Ω  
= 50Ω  
OUTA1  
OUTB  
0
0
ENA0  
ENA1  
ENB  
Protection Switching  
OUTB  
Z
= 50Ω  
0
LVCMOS/LVTTL  
LOGIC INPUTS  
Fault-Tolerant Systems  
LB_SELA  
LB_SELB  
BSEL  
GND GND GND GND  
Pin Configurations and Functional Diagram appear at end  
of data sheet.  
________________________________________________________________ Maxim Integrated Products  
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at  
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.  

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