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M74VHC1G135DFT1G PDF预览

M74VHC1G135DFT1G

更新时间: 2024-11-04 04:17:59
品牌 Logo 应用领域
安森美 - ONSEMI 触发器
页数 文件大小 规格书
6页 81K
描述
2−Input NAND Schmitt−Trigger with Open Drain Output

M74VHC1G135DFT1G 技术参数

是否无铅: 不含铅生命周期:Active
零件包装代码:SOT-353包装说明:TSSOP, TSSOP5/6,.08
针数:5Reach Compliance Code:compliant
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:1.18系列:AHC/VHC
JESD-30 代码:R-PDSO-G5JESD-609代码:e3
长度:2 mm负载电容(CL):50 pF
逻辑集成电路类型:NAND GATE最大I(ol):0.008 A
湿度敏感等级:1功能数量:1
输入次数:2端子数量:5
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:OPEN-DRAIN封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP5/6,.08
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TR峰值回流温度(摄氏度):260
电源:2/5.5 V最大电源电流(ICC):0.04 mA
Prop。Delay @ Nom-Sup:12.3 ns传播延迟(tpd):19.6 ns
认证状态:Not Qualified施密特触发器:YES
座面最大高度:1.1 mm子类别:Gates
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin (Sn)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:1.25 mmBase Number Matches:1

M74VHC1G135DFT1G 数据手册

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MC74VHC1G135  
2−Input NAND  
Schmitt−Trigger with  
Open Drain Output  
The MC74VHC1G135 is a single gate CMOS Schmitt NAND  
trigger with an open drain output fabricated with silicon gate CMOS  
technology. It achieves high speed operation similar to equivalent  
Bipolar Schottky TTL while maintaining CMOS low power  
dissipation.  
http://onsemi.com  
MARKING  
DIAGRAMS  
The internal circuit is composed of three stages, including an open  
drain output which provides the capability to set the output switching  
level. This allows the MC74VHC1G135 to be used to interface 5 V  
5
5
1
VZ M G  
circuits to circuits of any voltage between V and 7 V using an  
SC−88A/SOT−353/SC−70  
DF SUFFIX  
CC  
G
external resistor and power supply.  
1
5
CASE 419A  
The MC74VHC1G135 input structure provides protection when  
voltages up to 7 V are applied, regardless of the supply voltage.  
The MC74VHC1G135 can be used to enhance noise immunity or to  
square up slowly changing waveforms.  
5
VZ M G  
1
G
Features  
TSOP−5/SOT−23/SC−59  
DT SUFFIX  
1
High Speed: t = 4.9 ns (Typ) at V = 5 V  
PD  
CC  
CASE 483  
Low Internal Power Dissipation: I = 1 mA (Max) at T = 25°C  
CC  
A
VZ = Device Code  
Power Down Protection Provided on Inputs  
M
G
= Date Code*  
= Pb−Free Package  
Pin and Function Compatible with Other Standard Logic Families  
Chip Complexity: FETs = 70; Equivalent Gates = 18  
Pb−Free Packages are Available  
(Note: Microdot may be in either location)  
*Date Code orientation and/or position may vary  
depending upon manufacturing location.  
PIN ASSIGNMENT  
1
2
3
4
5
IN B  
V
IN B  
IN A  
GND  
1
2
3
5
CC  
IN A  
GND  
OVT  
OUT Y  
V
CC  
OUT Y  
4
FUNCTION TABLE  
Inputs  
Output  
Y
A
B
Figure 1. Pinout (Top View)  
L
L
L
H
L
Z
Z
Z
L
H
H
H
IN A  
IN B  
&
OUT Y  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
Figure 2. Logic Symbol  
©
Semiconductor Components Industries, LLC, 2007  
1
Publication Order Number:  
February, 2007 − Rev. 15  
MC74VHC1G135/D  

M74VHC1G135DFT1G 替代型号

型号 品牌 替代类型 描述 数据表
M74VHC1G135DTT1G ONSEMI

完全替代

2−Input NAND Schmitt−Trigger with Open Drain Output
M74VHC1G135DFT2G ONSEMI

类似代替

2−Input NAND Schmitt−Trigger with Open Drain Output
MC74VHC1G135DFT1 ONSEMI

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2-Input NAND Schmitt-Trigger with Open Drain Output

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