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M74VHC1GT08DFT1G

更新时间： 2024-02-09 19:26:24
品牌 Logo 应用领域
安森美 - ONSEMI 转换器电平转换器栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
6页 74K
描述
2−Input AND Gate/CMOS Logic Level Shifter

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M74VHC1GT08DFT1G 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SOT-353
包装说明：TSSOP,针数：5
Reach Compliance Code：unknown风险等级：5.73
系列：AHC/VHCJESD-30 代码：R-PDSO-G5
JESD-609代码：e3长度：2 mm
逻辑集成电路类型：AND GATE湿度敏感等级：NOT SPECIFIED
功能数量：1输入次数：2
端子数量：5最高工作温度：125 °C
最低工作温度：-55 °C封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：260
传播延迟（tpd）：16.5 ns认证状态：COMMERCIAL
座面最大高度：1.1 mm最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：3 V标称供电电压 (Vsup)：3.3 V
表面贴装：YES技术：CMOS
温度等级：MILITARY端子面层：MATTE TIN
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：40
宽度：1.25 mmBase Number Matches：1

M74VHC1GT08DFT1G 数据手册

 浏览型号M74VHC1GT08DFT1G的Datasheet PDF文件第2页浏览型号M74VHC1GT08DFT1G的Datasheet PDF文件第3页浏览型号M74VHC1GT08DFT1G的Datasheet PDF文件第4页浏览型号M74VHC1GT08DFT1G的Datasheet PDF文件第5页浏览型号M74VHC1GT08DFT1G的Datasheet PDF文件第6页 
MC74VHC1GT08  
2−Input AND Gate/CMOS  
Logic Level Shifter  
The MC74VHC1GT08 is an advanced high speed CMOS 2−input  
AND gate fabricated with silicon gate CMOS technology. It achieves  
high speed operation similar to equivalent Bipolar Schottky TTL  
while maintaining CMOS low power dissipation.  
http://onsemi.com  
The internal circuit is composed of three stages, including a buffer  
output which provides high noise immunity and stable output.  
The device input is compatible with TTL−type input thresholds and  
the output has a full 5 V CMOS level output swing. The input protection  
circuitry on this device allows overvoltage tolerance on the input,  
allowing the device to be used as a logic−level translator from 3 V  
CMOS logic to 5 V CMOS Logic or from 1.8 V CMOS logic to 3 V  
CMOS Logic while operating at the high−voltage power supply.  
The MC74VHC1GT08 input structure provides protection when  
voltages up to 7 V are applied, regardless of the supply voltage. This  
allows the MC74VHC1GT08 to be used to interface 5 V circuits to  
3 V circuits. The output structures also provide protection when  
MARKING  
DIAGRAMS  
5
5
1
SC−88A/SOT−353/SC−70  
DF SUFFIX  
VT M G  
G
CASE 419A  
1
5
5
VT M G  
1
G
V
CC  
= 0 V. These input and output structures help prevent device  
TSOP−5/SOT−23/SC−59  
DT SUFFIX  
destruction caused by supply voltage − input/output voltage mismatch,  
battery backup, hot insertion, etc.  
1
CASE 483  
Features  
VT = Device Code  
• High Speed: t = 3.5 ns (Typ) at V = 5 V  
PD  
CC  
M
G
= Date Code*  
= Pb−Free Package  
• Low Power Dissipation: I = 1 mA (Max) at T = 25°C  
CC  
A
(Note: Microdot may be in either location)  
*Date Code orientation and/or position may vary  
depending upon manufacturing location.  
• TTL−Compatible Inputs: V = 0.8 V; V = 2 V  
IL  
IH  
• CMOS−Compatible Outputs: V > 0.8 V ; V < 0.1 V @Load  
OH  
CC  
OL  
CC  
• Power Down Protection Provided on Inputs and Outputs  
• Balanced Propagation Delays  
• Pin and Function Compatible with Other Standard Logic Families  
• Chip Complexity: FETs = 64; Equivalent Gates = 15  
• Pb−Free Packages are Available  
PIN ASSIGNMENT  
1
2
3
4
5
IN B  
IN A  
GND  
OUT Y  
V
CC  
5
IN B  
IN A  
GND  
V
CC  
1
2
3
FUNCTION TABLE  
Inputs  
Output  
Y
A
B
L
L
L
H
L
L
L
4
OUT Y  
H
H
L
H
H
Figure 1. Pinout (Top View)  
IN A  
IN B  
&
OUT Y  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
Figure 2. Logic Symbol  
©
Semiconductor Components Industries, LLC, 2007  
1
Publication Order Number:  
February, 2007 − Rev. 10  
MC74VHC1GT08/D  
123456

中文翻译

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M74VHC1GT08DFT1G 替代型号

型号 品牌 替代类型 描述 数据表
MC74VHC1GT08DFT1 ONSEMI

完全替代

 2-Input AND Gate/CMOS Logic Level Shifter
M74VHC1GT08DFT2G ONSEMI

类似代替

 2−Input AND Gate/CMOS Logic Level Shifter
MC74VHC1GT08DFT2 ONSEMI

类似代替

 2-Input AND Gate/CMOS Logic Level Shifter

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