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M74HCT74TTR PDF预览

M74HCT74TTR

更新时间: 2024-11-06 23:01:27
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 触发器
页数 文件大小 规格书
10页 435K
描述
DUAL D TYPE FLIP FLOP WITH PRESET AND CLEAR

M74HCT74TTR 数据手册

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M74HCT74  
DUAL D TYPE FLIP FLOP WITH PRESET AND CLEAR  
HIGH SPEED :  
= 48MHz (TYP.) at V = 4.5V  
f
MAX  
CC  
LOW POWER DISSIPATION:  
=2µA(MAX.) at T =25°C  
I
CC  
A
COMPATIBLE WITH TTL OUTPUTS :  
= 2V (MIN.) V = 0.8V (MAX)  
V
IH  
IL  
DIP  
SOP  
TSSOP  
T & R  
BALANCED PROPAGATION DELAYS:  
t
t
PLH  
PHL  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 4mA (MIN)  
ORDER CODES  
PACKAGE  
OH  
OL  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 74  
TUBE  
DIP  
SOP  
M74HCT74B1R  
M74HCT74M1R  
M74HCT74RM13TR  
M74HCT74TTR  
DESCRIPTION  
The M74HCT74 is an high speed CMOS DUAL D  
TYPE FLIP FLOP WITH CLEAR fabricated with  
TSSOP  
2
silicon gate C MOS technology.  
The M74HCT74 is designed to directly interface  
HSC MOS systems with TTL and NMOS  
components.  
All inputs are equipped with protection circuits  
against static discharge and transient excess  
voltage.  
2
A signal on the D INPUT (nD) is transferred on the  
Q OUTPUT during the positive going transition of  
the clock pulse. CLEAR (CLR) and PRESET (PR)  
are independent of the clock and accomplished by  
a low on the appropriate input.  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
August 2001  
1/10  

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