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M74HCT86

更新时间： 2024-11-22 22:51:11

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		/
页数	文件大小	规格书
9页	234K
描述
QUAD EXCLUSIVE OR GATE

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中文翻译

获取价格

数据手册

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M74HCT86 数据手册

M54HCT86

M74HCT86

QUAD EXCLUSIVE OR GATE

HIGH SPEED

t_PD= 15 ns (TYP.) AT V_CC= 5 V

LOW POWER DISSIPATION

I_CC= 1 µA (MAX.) AT T_A= 25 °C

COMPATIBLE WITH TTL OUTPUTS

V_IH= 2V (MIN.) V_IL= 0.8V (MAX)

OUTPUT DRIVE CAPABILITY

10 LSTTL LOADS

SYMMETRICAL OUTPUT IMPEDANCE

I_OH= I_OL= 4 mA (MIN.)

BALANCED PROPAGATION DELAYS

t_PLH= t_PHL

PIN AND FUNCTION COMPATIBLE

B1R

(Plastic Package)

F1R

(Ceramic Package)

M1R

(Micro Package)

C1R

(Chip Carrier)

WITH 54/74LS86

ORDER CODES :

DESCRIPTION

M54HCT86F1R

M74HCT86M1R

M74HCT86B1R

M74HCT86C1R

The M54/74HCT86 is a high speed CMOS QUAD

EXCLUSIVE OR GATE fabricated in silicon gate

C²MOS technology.

PIN CONNECTIONS (top view)

It has the same high speed performance of LSTTL

combined with true CMOS low power consumption.

Input and output buffer are installed, which enables

high noise immunity and stable output.

All inputs are equipped with protection circuits

against static discharge and transient excess volt-

age.This integrated circuit has input and output

characteristics that are fully compatible with 54/74

LSTTL logic families. M54/74HCT devices are de-

signed to directly interface HSC²MOS systems with

TTL and NMOS components. They are also plug in

replacements for LSTTL devices giving a reduction

of power consumption.

INPUT AND OUTPUT EQUIVALENT CIRCUIT

NC =

No Internal

Connection

February 1993

1/9

12 3 4 5 6 7...9

中文翻译

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