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M74HC377 PDF预览

M74HC377

更新时间: 2024-11-24 22:57:55
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 触发器
页数 文件大小 规格书
11页 254K
描述
OCTAL D TYPE FLIP FLOP

M74HC377 数据手册

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M54HC377  
M74HC377  
OCTAL D TYPE FLIP FLOP  
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HIGH SPEED  
fMAX = 73 MHz (TYP.) at VCC = 5 V  
LOW POWER DISSIPATION  
ICC = 4 µA (MAX.) at 25 °C  
HIGH NOISE IMMUNITY  
VNIH = VNIL = 28 % VCC (MIN.)  
OUTPUT DRIVE CAPABILITY  
10 LSTTL LOADS  
SYMMETRICAL OUTPUT IMPEDANCE  
|IOH| = IOL = 4 mA (MIN.)  
BALANCED PROPAGATION DELAYS  
tPLH = tPHL  
WIDE OPERATING VOLTAGE RANGE  
B1R  
(Plastic Package)  
F1R  
(Ceramic Package)  
M1R  
(Micro Package)  
C1R  
(Chip Carrier)  
VCC (OPR) = 2 V to 6 V  
PIN AND FUNCTION COMPATIBLE WITH  
54/74LS377  
ORDER CODES :  
M54HC377F1R  
M74HC377B1R  
M74HC377M1R  
M74HC377C1R  
PIN CONNECTIONS (top view)  
DESCRIPTION  
The M54/74HC377 is a high speed CMOS OCTAL-  
D-TYPE FLIP FLOP fabricated in silicon gate  
C2MOS technology. It has the same highspeed per-  
formance of LSTTL combined with true CMOS low  
power consumption.  
Information at the D inputs meeting the setup time  
requirements is transferred to the Q outputs on the  
positive-going edge of the clock pulse if the enable  
input G is low. Clock triggering occurs at a particular  
voltage level and is not directly related to the transi-  
tion time of the positive-going pulse. When the clock  
input is at either the high or low level, the D input sig-  
nal has no effect at the output. All inputs are  
equipped with protection circuits against static dis-  
charge and transient excess voltage.  
NC =  
No Internal  
Connection  
February 1993  
1/11  

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