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M74HC386 PDF预览

M74HC386

更新时间: 2024-11-03 22:57:55
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
9页 235K
描述
QUAD EXCLUSIVE OR GATE

M74HC386 数据手册

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M54HC386  
M74HC386  
QUAD EXCLUSIVE OR GATE  
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HIGH SPEED  
tPD = 10 ns (TYP.) AT VCC = 5 V  
LOW POWER DISSIPATION  
ICC = 1 µA (MAX.) AT TA = 25 °C  
HIGH NOISE IMMUNITY  
VNIH = VNIL = 28 % VCC (MIN.)  
OUTPUT DRIVE CAPABILITY  
10 LSTTL LOADS  
SYMMETRICAL OUTPUT IMPEDANCE  
|IOH| = IOL = 4 mA (MIN.)  
BALANCED PROPAGATION DELAYS  
tPLH = tPHL  
WIDE OPERATING VOLTAGE RANGE  
B1R  
(Plastic Package)  
F1R  
(Ceramic Package)  
M1R  
(Micro Package)  
C1R  
(Chip Carrier)  
VCC (OPR) = 2 V TO 6 V  
PIN AND FUNCTION COMPATIBLE WITH  
54/74LS386  
ORDER CODES :  
M54HC386F1R  
M74HC386B1R  
M74HC386M1R  
M74HC386C1R  
DESCRIPTION  
The M54/74HC386 is a high speed CMOS QUAD  
EXCLUSIVE-OR GATE fabricated in silicon gate  
C2MOS technology.  
PIN CONNECTIONS (top view)  
It has the same high speed performance of LSTTL  
combined with true CMOS low power consumption.  
An output buffer provides high noise immunity and  
a stable output.  
All inputs are equipped with protection circuits  
against static discharge and transient excess volt-  
age.  
INPUT AND OUTPUT EQUIVALENT CIRCUIT  
NC =  
No Internal  
Connection  
February 1993  
1/9  

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