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M5M54R04J-12 PDF预览

M5M54R04J-12

更新时间: 2024-11-28 22:06:31
品牌 Logo 应用领域
三菱 - MITSUBISHI /
页数 文件大小 规格书
6页 58K
描述
4194304-BIT (1048576-WORD BY 4-BIT) CMOS STATIC RAM

M5M54R04J-12 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOJ包装说明:SOJ, SOJ32,.44
针数:32Reach Compliance Code:unknown
ECCN代码:3A991.B.2.AHTS代码:8542.32.00.41
风险等级:5.82最长访问时间:12 ns
I/O 类型:COMMONJESD-30 代码:R-PDSO-J32
JESD-609代码:e0内存密度:4194304 bit
内存集成电路类型:STANDARD SRAM内存宽度:4
功能数量:1端子数量:32
字数:1048576 words字数代码:1000000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:1MX4
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:SOJ封装等效代码:SOJ32,.44
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V认证状态:Not Qualified
最大待机电流:0.01 A最小待机电流:4.5 V
子类别:SRAMs最大压摆率:0.16 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:J BEND
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIEDBase Number Matches:1

M5M54R04J-12 数据手册

 浏览型号M5M54R04J-12的Datasheet PDF文件第2页浏览型号M5M54R04J-12的Datasheet PDF文件第3页浏览型号M5M54R04J-12的Datasheet PDF文件第4页浏览型号M5M54R04J-12的Datasheet PDF文件第5页浏览型号M5M54R04J-12的Datasheet PDF文件第6页 
MITSUBISHI LSIs  
M5M54R04J-12,-15  
1997.11.20 Rev.F  
4194304-BIT (1048576-WORD BY 4-BIT) CMOS STATIC RAM  
DESCRIPTION  
The M5M54R04J is a family of 1048576-word by 4-bit static  
RAMs, fabricated with the high performance CMOS silicon gate  
process and designed for high speed application.  
PIN CONFIGURATION (TOP VIEW)  
A0  
1
2
32 A19  
The M5M54R04J is offered in a 32-pin plastic small outline J-  
lead package(SOJ).  
31  
A1  
A2  
A3  
A4  
A18  
address  
inputs  
address  
inputs  
30  
3
4
5
A17  
A16  
A15  
OE  
29  
28  
27  
These device operate on a single 5V supply, and are directly  
chip select  
input  
output enable  
input  
TTL compatible. They include a power down feature as well.  
FEATURES  
6
7
8
S
DQ1  
VCC  
GND  
DQ2  
W
data inputs/  
26  
25  
24  
DQ4 data inputs/  
GND  
VCC  
outputs  
(5V)  
outputs  
(0V)  
• Fast access time  
M5M54R04J-12 •••• 12ns(max)  
M5M54R04J-15 •••• 15ns(max)  
(0V)  
data inputs/  
outputs  
9
(5V)  
data inputs/  
10  
23 DQ3  
• Low power dissipation  
Active •••••••••• 450mW(typ)  
Stand by •••••••••• 5mW(typ)  
outputs  
22  
11  
12  
13  
A14  
A13  
write control  
input  
21  
A5  
A6  
A7  
A8  
A9  
• Single +5V power supply  
Fully static operation : No clocks, No refresh  
• Common data I/O  
address  
inputs  
20 A12  
address  
inputs  
19  
14  
15  
16  
A11  
18 A10  
• Easy memory expansion by S  
17  
NC  
• Three-state outputs : OR-tie capability  
• OE prevents data contention in the I/O bus  
• Directly TTL compatible : All inputs and outputs  
Outline 32P0K(SOJ)  
PACKAGE  
32pin 400mil SOJ  
APPLICATION  
High-speed memory units  
BLOCK DIAGRAM  
DQ1  
DQ2  
DQ3  
DQ4  
7
A0  
1
2
10  
23  
26  
A1  
A2  
3
MEMORY ARRAY  
512 ROWS  
8192 COLUMNS  
A3  
A4  
A5  
4
address  
inputs  
data  
5
inputs/  
outputs  
12  
13  
14  
15  
A6  
A7  
A8  
COLUMN I/O CIRCUITS  
S
6
COLUMN ADDRESS  
DECODERS  
8
VCC(5V)  
GND(0V)  
W
11  
24  
COLUMN INPUT BUFFERS  
9
OE 27  
25  
16 18 19  
31 32  
20 21 22 28 29 30  
A9 A10 A11A12 A13A14 A15 A16 A17 A18 A19  
address  
inputs  
MITSUBISHI  
ELECTRIC  
1

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