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M5M54R08J-15 PDF预览

M5M54R08J-15

更新时间: 2024-11-28 22:06:51
品牌 Logo 应用领域
三菱 - MITSUBISHI 内存集成电路静态存储器光电二极管
页数 文件大小 规格书
6页 60K
描述
4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM

M5M54R08J-15 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SOJ
包装说明:SOJ, SOJ36,.44针数:36
Reach Compliance Code:unknownECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41风险等级:5.91
Is Samacsys:N最长访问时间:15 ns
I/O 类型:COMMONJESD-30 代码:R-PDSO-J36
JESD-609代码:e0内存密度:4194304 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
功能数量:1端子数量:36
字数:524288 words字数代码:512000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:512KX8
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:SOJ封装等效代码:SOJ36,.44
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V认证状态:Not Qualified
最大待机电流:0.01 A最小待机电流:4.5 V
子类别:SRAMs最大压摆率:0.16 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:J BEND
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIEDBase Number Matches:1

M5M54R08J-15 数据手册

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MITSUBISHI LSIs  
M5M54R08J-12,-15  
1997.11.20 Rev.F  
4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM  
DESCRIPTION  
The M5M54R08J is a family of 524288-word by 8-bit static  
RAMs, fabricated with the high performance CMOS silicon gate  
process and designed for high speed application.  
PIN CONFIGURATION (TOP VIEW)  
1
2
36 NC  
35 A18  
34 A17  
A0  
A1  
A2  
A3  
A4  
S
The M5M54R08J is offered in a 36-pin plastic small outline J-  
lead package(SOJ).  
address  
inputs  
address  
inputs  
3
4
5
33  
A16  
These device operate on a single 5V supply, and are directly  
32 A15  
31 OE  
30 DQ8  
output enable  
input  
chip select  
input  
data inputs/  
outputs  
TTL compatible. They include a power down feature as well.  
6
7
8
data  
DQ1  
DQ2  
VCC  
GND  
DQ3  
FEATURES  
inputs/  
29  
DQ7  
outputs  
• Fast access time  
M5M54R08J-12 •••• 12ns(max)  
M5M54R08J-15 •••• 15ns(max)  
(5V)  
(0V)  
9
28 GND  
(0V)  
data  
10  
27  
(5V)  
VCC  
DQ6  
data  
• Low power dissipation  
Active •••••••••• 550mW(typ)  
Stand by •••••••••• 5mW(typ)  
26  
11  
inputs/  
inputs/  
outputs  
write control  
input  
DQ4 12  
25 DQ5  
outputs  
• Single +5V power supply  
• Fully static operation : No clocks, No refresh  
• Common data I/O  
13  
24  
W
A14  
A13  
23  
A5 14  
A6 15  
address  
inputs  
22  
A12  
address  
inputs  
• Easy memory expansion by S  
16  
21 A11  
A7  
A8  
A9  
• Three-state outputs : OR-tie capability  
• OE prevents data contention in the I/O bus  
• Directly TTL compatible : All inputs and outputs  
A10  
17  
18  
20  
19  
NC  
Outline 36P0K (SOJ)  
APPLICATION  
High-speed memory units  
PACKAGE  
36pin 400mil SOJ  
BLOCK DIAGRAM  
7
8
DQ1  
DQ2  
DQ3  
DQ4  
DQ5  
DQ6  
A0  
1
2
A1  
A2  
11  
12  
25  
26  
3
MEMORY ARRAY  
512 ROWS  
8192 COLUMNS  
A3  
A4  
A5  
4
address  
inputs  
5
14  
15  
16  
17  
29 DQ7  
A6  
A7  
A8  
DQ8  
30  
data  
inputs/  
outputs  
COLUMN I/O CIRCUITS  
S
6
COLUMN ADDRESS  
DECODERS  
9
VCC(5V)  
GND(0V)  
W
13  
27  
COLUMN INPUT BUFFERS  
10  
28  
OE 31  
18 20 21  
22 23 24 32 33 34 35  
A9 A10 A11 A12 A13A14 A15 A16 A16  
A17  
address  
inputs  
MITSUBISHI  
ELECTRIC  
1

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