5秒后页面跳转
捷配首页

Datasheet > M5M54R16AJ-15
M5M54R16AJ-15 PDF预览

M5M54R16AJ-15

更新时间： 2024-11-28 22:20:07
品牌 Logo 应用领域
三菱 - MITSUBISHI /
页数 文件大小 规格书
7页 66K
描述
4194304-BIT (262144-WORD BY 16-BIT) CMOS STATIC RAM

阅读下载

中文翻译

获取价格

M5M54R16AJ-15 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：SOJ
包装说明：SOJ, SOJ44,.44针数：44
Reach Compliance Code：unknownECCN代码：3A991.B.2.A
HTS代码：8542.32.00.41风险等级：5.3
最长访问时间：15 nsI/O 类型：COMMON
JESD-30 代码：R-PDSO-J44JESD-609代码：e0
长度：28.57 mm内存密度：4194304 bit
内存集成电路类型：STANDARD SRAM内存宽度：16
功能数量：1端子数量：44
字数：262144 words字数代码：256000
工作模式：ASYNCHRONOUS最高工作温度：70 °C
最低工作温度：组织：256KX16
输出特性：3-STATE封装主体材料：PLASTIC/EPOXY
封装代码：SOJ封装等效代码：SOJ44,.44
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
并行/串行：PARALLEL峰值回流温度（摄氏度）：NOT SPECIFIED
电源：3.3 V认证状态：Not Qualified
座面最大高度：3.55 mm最大待机电流：0.01 A
最小待机电流：3.14 V子类别：SRAMs
最大压摆率：0.23 mA标称供电电压 (Vsup)：3.3 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：J BEND端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：10.16 mmBase Number Matches：1

M5M54R16AJ-15 数据手册

 浏览型号M5M54R16AJ-15的Datasheet PDF文件第2页浏览型号M5M54R16AJ-15的Datasheet PDF文件第3页浏览型号M5M54R16AJ-15的Datasheet PDF文件第4页浏览型号M5M54R16AJ-15的Datasheet PDF文件第5页浏览型号M5M54R16AJ-15的Datasheet PDF文件第6页浏览型号M5M54R16AJ-15的Datasheet PDF文件第7页 
MITSUBISHI LSIs  
1998.11.30 Ver.B  
M5M54R16AJ,ATP-10,-12,-15  
P RELIMINARY  
Notice: This is not a final specification.  
Some parametric limits are subject to change.  
4194304-BIT (262144-WORD BY 16-BIT) CMOS STATIC RAM  
DESCRIPTION  
PIN CONFIGURATION (TOP VIEW)  
The M5M54R16A is a family of 262144-word by 16-bit  
static RAMs, fabricated with the high performance CMOS  
process and designed for high speed application. These  
devices operate on a single 3.3V supply, and are directly  
TTL compatible.  
A0  
A1  
A2  
44  
43  
A17  
A16  
A15  
OE  
UB  
LB  
1
2
ADDRESS  
INPUTS  
ADDRESS  
INPUTS  
3
4
42  
41  
OUTPUT  
ENABLE INPUT  
A3  
They include a power down feature as well. In write  
and read cycles, the lower and upper bytes are able  
to be controled either togethe or separately by LB  
and UB.  
A4  
BYTE  
CONTROL  
INPUTS  
5
6
40  
39  
CHIP SELECT  
INPUT  
S
DQ1  
DQ2  
DQ3  
DQ4  
VCC  
GND  
DQ5  
DQ6  
DQ7  
DQ8  
7
8
38  
37  
DQ16  
DQ15  
DQ14  
DQ13  
GND  
VCC  
DQ12  
DQ11  
DQ10  
DQ9  
N.C  
DATA  
INPUTS/  
OUTPUTS  
DATA  
INPUTS/  
OUTPUTS  
9
36  
35  
10  
FEATURES  
•Fast access time  
(3.3V)  
(0V)  
11  
12  
34  
33  
(0V)  
M5M54R16AJ,ATP-10 ... 10ns(max)  
M5M54R16AJ,ATP-12 ... 12ns(max)  
M5M54R16AJ,ATP-15 ... 15ns(max)  
(3.3V)  
13  
32  
31  
DATA  
INPUTS/  
OUTPUTS  
DATA  
INPUTS/  
OUTPUTS  
14  
15  
16  
30  
29  
28  
WRITE  
CONTROL INPUT  
•Single +3.3V power supply  
W
A5  
A6  
A7  
A8  
A9  
17  
18  
19  
20  
27  
A14  
A13  
A12  
A11  
•Fully static operation : No clocks, No refresh  
•Common data I/O  
26  
25  
24  
ADDRESS  
INPUTS  
ADDRESS  
INPUTS  
•Easy memory expansion by S  
21  
22  
A10  
23  
•Three-state outputs : OR-tie capability  
•OE prevents data contention in the I/O bus  
•Directly TTL compatible : All inputs and outputs  
•Separate control of lower and upper bytes by LB and UB  
Outline 44P0K  
APPLICATION  
High-speed memory system  
PACKAGE  
M5M54R16AJ .......... 44pin 400mil SOJ  
M5M54R16ATP .......... 44pin 400mil TSOP(II)  
FUNCTION  
state. (LB and/or UB=L, S=L)  
The operation mode of the M5M54R16A is determined  
by a combination of the device control inputs S, W, OE,  
LB, and UB. Each mode is summarized in the function  
table.  
When setting LB at a high level and other pins are in  
an active state, upper-Byte are in a selectable mode  
in which both reading and writing are enable, and  
lower-Byte are in a non-selectable mode. And when  
setting UB at a high level and other pins are in an  
active state, lower-Byte are in a selectable mode in  
which both reading and writing are enable, and upper-  
Byte are in a non-selectable mode.  
When setting LB and UB at a high level or S at high  
level, the chip is in a non-selectable mode in which  
both reading and writing are disabled. In this mode,  
the output stage is in a high-impedance state,  
allowing OR-tie with other chips and memory  
expansion by LB, UB and S.  
A write cycle is executed whenever the low level W  
overlaps with low level LB and/or low level UB and low  
level S. The address must be set-up before write cycle  
and must be stable during the entire cycle.  
The data is latched into a cell on the traling edge of  
W, LB, UB or S, whichever occurs first, requiring the  
set-up and hold time relative to these edge to be  
maintained. The output enable input OE directly  
controls the output stage. Setting the OE at a high level,  
the output stage is in a high impedance state, and the  
data bus contention problem in the write cycle is  
eliminated.  
Signal-S controls the power-down feature. When S  
goes high, power dissapation is reduced extremely.  
The access time from S is equivalent to the address  
access time.  
A read cycle is excuted by setting W at a high level  
and OE at a low level while LB and/or UB and S are in  
an active  
MITSUBISHI  
ELECTRIC  
1
1234567

中文翻译

下载PDF

与M5M54R16AJ-15相关器件

型号 品牌 获取价格 描述 数据表
M5M54R16ATP-10 MITSUBISHI

获取价格

 		4194304-BIT (262144-WORD BY 16-BIT) CMOS STATIC RAM
M5M54R16ATP-12 MITSUBISHI

获取价格

 		4194304-BIT (262144-WORD BY 16-BIT) CMOS STATIC RAM
M5M54R16ATP-15 MITSUBISHI

获取价格

 		4194304-BIT (262144-WORD BY 16-BIT) CMOS STATIC RAM
M5M5-4W-M MSYSTEM

获取价格

 		Super-mini Terminal Block Signal Conditioners M5-UNIT
M5M5-4W-M/A1 MSYSTEM

获取价格

 		Super-mini Terminal Block Signal Conditioners M5-UNIT
M5M5-4W-M/K MSYSTEM

获取价格

 		Super-mini Terminal Block Signal Conditioners M5-UNIT
M5M5-4W-M/Q MSYSTEM

获取价格

 		Super-mini Terminal Block Signal Conditioners M5-UNIT
M5M5-4W-R MSYSTEM

获取价格

 		Super-mini Terminal Block Signal Conditioners M5-UNIT
M5M5-4W-R/A1 MSYSTEM

获取价格

 		Super-mini Terminal Block Signal Conditioners M5-UNIT
M5M5-4W-R/K MSYSTEM

获取价格

 		Super-mini Terminal Block Signal Conditioners M5-UNIT

与M5M54R16AJ-15相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证