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M54HC02 PDF预览

M54HC02

更新时间: 2024-11-26 22:46:39
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 输入元件
页数 文件大小 规格书
9页 236K
描述
QUAD 2-INPUT NOR GATE

M54HC02 数据手册

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M54HC02  
M74HC02  
QUAD 2-INPUT NOR GATE  
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HIGH SPEED  
tPD = 6 ns (TYP.) AT VCC = 5 V  
LOW POWER DISSIPATION  
ICC = 1 µA (MAX.) AT TA = 25 °C  
HIGH NOISE IMMUNITY  
VNIH = VNIL = 28 % VCC (MIN.)  
OUTPUT DRIVE CAPABILITY  
10 LSTTL LOADS  
SYMMETRICAL OUTPUT IMPEDANCE  
IOH = IOL = 4 mA (MIN.)  
BALANCED PROPAGATION DELAYS  
tPLH = tPHL  
WIDE OPERATING VOLTAGE RANGE  
B1R  
(Plastic Package)  
F1R  
(Ceramic Package)  
M1R  
(Micro Package)  
C1R  
(Chip Carrier)  
VCC (OPR) = 2 V TO 6 V  
PIN AND FUNCTION COMPATIBLE  
WITH 54/74LS02  
ORDER CODES :  
M54HC02F1R  
M74HC02B1R  
M74HC02M1R  
M74HC02C1R  
PIN CONNECTIONS (top view)  
DESCRIPTION  
The M54/74HC02 is a high speed CMOS QUAD 2-  
INPUTNORGATEfabricated in silicongateC2MOS  
technology. It has the same high speed perform-  
ance of LSTTL combinedwithtrue CMOSlowpower  
consumption.  
The internal circuit is composed of 3 stages includ-  
ing buffer output, which gives high noise immunity  
and stable output.  
All inputs are equipped with protection circuits  
against static discharge and transient excess volt-  
age.  
INPUT AND OUTPUT EQUIVALENT CIRCUIT  
NC =  
No Internal  
Connection  
December 1992  
1/9  

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