PC133 Low Profile Unbuffered DIMM
M374S3323ETU
M374S3323ETU SDRAM DIMM
32Mx72 SDRAM DIMM with ECC based on 16Mx8, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs
GENERAL DESCRIPTION
FEATURE
• Performance range
The Samsung M374S3323ETU is a 32M bit x 72 Synchronous
Dynamic RAM high density memory module. The Samsung
M374S3323ETU consists of eighteen CMOS 16M x 8 bit with
4banks Synchronous DRAMs in TSOP-II 400mil package and a
2K EEPROM in 8-pin TSOP package on a 168-pin glass-epoxy
substrate. Two 0.1uF decoupling capacitors are mounted on the
printed circuit board in parallel for each SDRAM and four 2.2uF
bulk capacitors per DIMM.
Part No.
Max Freq. (Speed)
M374S3323ETU-C/L7C 133MHz (7.5ns @ CL=2)
M374S3323ETU-C/L7A 133MHz (7.5ns @ CL=3)
• Burst mode operation
• Auto & self refresh capability (4096 Cycles/64ms)
• LVTTL compatible inputs and outputs
• Single 3.3V ± 0.3V power supply
• MRS cycle with address key programs
Latency (Access from column address)
Burst length (1, 2, 4, 8 & Full page)
Data scramble (Sequential & Interleave)
• All inputs are sampled at the positive going edge of the
system clock
The M374S3323ETU is a Dual In-line Memory Module and is
intended for mounting into 168-pin edge connector sockets.
Synchronous design allows precise cycle control with the use of
system clock. I/O transactions are possible on every clock cycle.
Range of operating frequencies, programmable latencies allows
the same device to be useful for a variety of high bandwidth, high
performance memory system applications.
• Serial presence detect with EEPROM
• PCB : Height (1,125mil), double sided component
PIN CONFIGURATIONS (Front side/back side)
PIN NAMES
Pin Front Pin Front Pin Front Pin Back Pin Back Pin Back
Pin Name
A0 ~ A11
Function
Address input (Multiplexed)
Select bank
1
2
3
4
5
6
7
8
9
VSS
29 DQM1 57 DQ18 85
VSS
113 DQM5 141 DQ50
58 DQ19 86 DQ32 114 CS1 142 DQ51
59 87 DQ33 115 RAS 143 VDD
60 DQ20 88 DQ34 116
61 NC 89 DQ35 117
62 *VREF 90 118
63 CKE1 91 DQ36 119
BA0 ~ BA1
DQ0 ~ DQ63
CB0 ~ 7
DQ0 30
DQ1 31
DQ2 32
DQ3 33
CS0
DU
VSS
A0
Data input/output
VDD
VSS
A1
A3
A5
A7
A9
144 DQ52
145 NC
146 *VREF
147 NC
148 VSS
149 DQ53
Check bit (Data-in/data-out)
CLK0 ~ CLK3 Clock input
VDD
34
A2
VDD
CKE0 ~ CKE1 Clock enable input
DQ4 35
DQ5 36
DQ6 37
A4
64
65
66
67
68
A6
A8
VSS
92 DQ37 120
CS0 ~ CS3
RAS
Chip select input
Row address strobe
Column address strobe
Write enable
DQ21 93 DQ38 121
DQ22 94 DQ39 122 BA0 150 DQ54
DQ23 95 DQ40 123 A11 151 DQ55
10 DQ7 38 A10/AP
11 DQ8 39
12 40
13 DQ9 41
14 DQ10 42
15 DQ11 43
16 DQ12 44
17 DQ13 45
CAS
BA1
VDD
VDD
WE
VSS
VSS
96
VSS
124
VDD
152 VSS
69 DQ24 97 DQ41 125 CLK1 153 DQ56
DQM0 ~ 7
VDD
DQM
CLK0 70 DQ25 98 DQ42 126 *A12 154 DQ57
Power supply (3.3V)
Ground
VSS
DU
CS2
71 DQ26 99 DQ43 127
72 DQ27 100 DQ44 128 CKE0 156 DQ59
73 101 DQ45 129 CS3 157 VDD
VSS
155 DQ58
VSS
VDD
*VREF
SDA
Power supply for reference
Serial data I/O
Serial clock
18
VDD
46 DQM2 74 DQ28 102 VDD 130 DQM6 158 DQ60
19 DQ14 47 DQM3 75 DQ29 103 DQ46 131 DQM7 159 DQ61
SCL
20 DQ15 48
DU
VDD
NC
76 DQ30 104 DQ47 132 *A13 160 DQ62
21 CB0
22 CB1
49
50
51
52
53
54
77 DQ31 105 CB4 133
VDD
NC
NC
161 DQ63
162 VSS
163 CLK3
SA0 ~ 2
DU
Address in EEPROM
Don¢t use
78
79
80
81
82
83
VSS
106 CB5 134
23
24
25
26
27
VSS
NC
NC
VDD
WE
NC
CLK2 107 VSS 135
NC
NC
**SDA 110 VDD 138
**SCL 111 CAS 139 DQ48 167 **SA2
112 DQM4 140 DQ49 168 VDD
NC
No connection
CB2
CB3
VSS
108
109
NC
NC
136 CB6 164 NC
137 CB7 165 **SA0
*
These pins are not used in this module.
** These pins should be NC in the system
VSS
166 **SA1
55 DQ16
which does not support SPD.
28 DQM0 56 DQ17 84
VDD
SAMSUNG ELECTRONICS CO., Ltd. reserves the right to change products and specifications without notice.
Rev. 1.0 Nov. 2002