M36L0T7050T0

更新时间： 2024-11-17 22:08:19

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		闪存静态存储器
页数	文件大小	规格书
18页	363K
描述
128Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 32Mbit (2M x16) PSRAM, Multi-Chip Package

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中文翻译

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数据手册

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M36L0T7050T0 数据手册

M36L0T7050T0

M36L0T7050B0

128Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory

32Mbit (2M x16) PSRAM, Multi-Chip Package

FEATURES SUMMARY

■

MULTI-CHIP PACKAGE

Figure 1. Package

–

1 die of 128Mbit (8Mx16, Multiple Bank,

Multi-level, Burst) Flash Memory

–

1 die of 32Mbit (2Mx16) Pseudo SRAM

■

SUPPLY VOLTAGE

–

V_DDF= 1.7 to 2V

V_DDP= V_DDQ= 2.7 to 3.3V

FBGA

V_PP= 9V for fast program (12V tolerant)

■

ELECTRONIC SIGNATURE

–

Manufacturer Code: 20h

Device Code (Top Flash Configuration)

M36L0T7050T0: 88C4h

TFBGA88 (ZAQ)

8 x 10mm

–

Device Code (Bottom Flash

Configuration) M36L0T7050B0: 88C5h

PACKAGE

–

Compliant with Lead-Free Soldering

Processes

■

BLOCK LOCKING

–

All blocks locked at power-up

Any combination of blocks can be locked

with zero latency

WP for Block Lock-Down

Absolute Write Protection with V_PP= V_SS

–

Lead-Free Versions

FLASH MEMORY

■

SYNCHRONOUS / ASYNCHRONOUS READ

–

Synchronous Burst Read mode: 50MHz

Asynchronous Page Read mode

Random Access: 90ns

■

COMMON FLASH INTERFACE (CFI)

100,000 PROGRAM/ERASE CYCLES per

BLOCK

■

SYNCHRONOUS BURST READ SUSPEND

PROGRAMMING TIME

–

PSRAM

10µs typical Word program time using

Write to Buffer and Program

■

ACCESS TIME: 70ns

LOW STANDBY CURRENT: 100µA

DEEP POWER-DOWN CURRENT: 10µA

BYTE CONTROL: UB_P/LB_P

PROGRAMMABLE PARTIAL ARRAY

8 WORD PAGE ACCESS CAPABILITY: 18ns

POWER-DOWN MODES

■

MEMORY ORGANIZATION

–

Multiple Bank Memory Array: 8 Mbit

Banks

Parameter Blocks (Top or Bottom

location)

–

DUAL OPERATIONS

–

program/erase in one Bank while read in

others

No delay between read and write

operations

– Deep Power-Down

– 4 Mbit Partial Array Refresh

– 8 Mbit Partial Array Refresh

– 16 Mbit Partial Array Refresh

–

SECURITY

–

64 bit unique device number

2112 bit user programmable OTP Cells

December 2004

1/18

12 3 4 5 6 7...18

中文翻译

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与M36L0T7050T0相关器件

型号	品牌	获取价格	描述	数据表
M36L0T7050T0ZAQ	NUMONYX	获取价格	Memory Circuit, 8MX16, CMOS, PBGA88, 8 X 10 MM, 0.80 MM PITCH, TFBGA-88
M36L0T7050T0ZAQE	STMICROELECTRONICS	获取价格	128Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 32Mbit (2M x16) PSRAM, Multi-Chip
M36L0T7050T0ZAQF	STMICROELECTRONICS	获取价格	128Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 32Mbit (2M x16) PSRAM, Multi-Chip
M36L0T7050T0ZAQF	NUMONYX	获取价格	Memory Circuit, 8MX16, CMOS, PBGA88, 8 X 10 MM, 0.80 MM PITCH, LEAD FREE, TFBGA-88
M36L0T7050T0ZAQT	STMICROELECTRONICS	获取价格	128Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 32Mbit (2M x16) PSRAM, Multi-Chip
M36L0T7050T2	NUMONYX	获取价格	128 Mbit (Multiple Bank, Multi-Level, Burst) Flash memory and 32 Mbit (2Mb x16) PSRAM, Mul
M36L0T7050T2ZAQ	NUMONYX	获取价格	128 Mbit (Multiple Bank, Multi-Level, Burst) Flash memory and 32 Mbit (2Mb x16) PSRAM, Mul
M36L0T7050T2ZAQE	NUMONYX	获取价格	128 Mbit (Multiple Bank, Multi-Level, Burst) Flash memory and 32 Mbit (2Mb x16) PSRAM, Mul
M36L0T7050T2ZAQF	NUMONYX	获取价格	128 Mbit (Multiple Bank, Multi-Level, Burst) Flash memory and 32 Mbit (2Mb x16) PSRAM, Mul
M36L0T7050T2ZAQT	NUMONYX	获取价格	128 Mbit (Multiple Bank, Multi-Level, Burst) Flash memory and 32 Mbit (2Mb x16) PSRAM, Mul

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