LTC2265IUJ-14

更新时间： 2024-11-12 05:43:43

品牌	Logo	应用领域
凌特 - Linear		/
页数	文件大小	规格书
32页	1640K
描述
14-Bit, 65Msps/40Msps/25Msps Low Power Dual ADCs

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中文翻译

获取价格

数据手册

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LTC2265IUJ-14 数据手册

LTC2265-14/

LTC2264-14/LTC2263-14

14-Bit, 65Msps/40Msps/

25Msps Low Power Dual ADCs

FEATURES

DESCRIPTION

TheLTC^®2265-14/LTC2264-14/LTC2263-14are2-channel,

simultaneous sampling 14-bit A/D converters designed

for digitizing high frequency, wide dynamic range signals.

They are perfect for demanding communications applica-

tions with AC performance that includes 73.7dB SNR and

90dB spurious free dynamic range (SFDR). Ultralow jitter

2-Channel Simultaneous Sampling ADC

73.7dB SNR

90dB SFDR

Low Power: 171mW/113mW/94mW Total

85mW/56mW/47mW per Channel

Single 1.8V Supply

Serial LVDS Outputs: 1 or 2 Bits per Channel

of0.15ps

allowsundersamplingofIFfrequencieswith

RMS

Selectable Input Ranges: 1V to 2V

excellent noise performance.

P-P

800MHz Full Power Bandwidth S/H

DC specs include 1LSB INL (typ), 0.3LSB DNL (typ)

and no missing codes over temperature. The transition

Shutdown and Nap Modes

Serial SPI Port for Conﬁguration

noise is a low 1.2LSB

RMS

Pin Compatible 14-Bit and 12-Bit Versions

The digital outputs are serial LVDS to minimize the num-

ber of data lines. Each channel outputs two bits at a time

(2-lanemode)oronebitatatime(1-lanemode).TheLVDS

drivers have optional internal termination and adjustable

output levels to ensure clean signal integrity.

40-Pin (6mm × 6mm) QFN Package

APPLICATIONS

Communications

–

Cellular Base Stations

The ENC and ENC inputs may be driven differentially

or single-ended with a sine wave, PECL, LVDS, TTL, or

CMOS inputs. An internal clock duty cycle stabilizer

allows high performance at full speed for a wide range of

clock duty cycles.

Software Deﬁned Radios

Portable Medical Imaging

Multichannel Data Acquisition

Nondestructive Testing

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. All other trademarks are the property of their respective owners.

TYPICAL APPLICATION

LTC2265-14, 65Msps,

2-Tone FFT, f_IN= 70MHz and 75MHz

1.8V

–10

–20

–30

–40

–50

–60

–70

CH.1

ANALOG

INPUT

–

OUT1A

OUT1B

14-BIT

ADC CORE

S/H

SERIALIZED

LVDS

OUTPUTS

DATA

SERIALIZER

OUT2A

OUT2B

CH.2

ANALOG

INPUT

–

14-BIT

ADC CORE

S/H

DATA

CLOCK

OUT

–80

–90

–100

–110

–120

ENCODE

INPUT

PLL

FRAME

FREQUENCY (MHz)

GND

OGND

226514 TA01

226514 TA02

22654314f

12 3 4 5 6 7...32

中文翻译

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与LTC2265IUJ-14相关器件

型号	品牌	获取价格	描述	数据表
LTC2265IUJ-14#PBF	Linear	获取价格	LTC2265-14 - 14-Bit, 65Msps Low Power Dual ADCs; Package: QFN; Pins: 40; Temperature Range
LTC2265IUJ-14#TRPBF	Linear	获取价格	LTC2265-14 - 14-Bit, 65Msps Low Power Dual ADCs; Package: QFN; Pins: 40; Temperature Range
LTC2265IUJ-14PBF	Linear	获取价格	14-Bit, 65Msps/40Msps/25Msps Low Power Dual ADCs
LTC2265IUJ-14TRPBF	Linear	获取价格	14-Bit, 65Msps/40Msps/25Msps Low Power Dual ADCs
LTC2266-12	Linear	获取价格	16-Bit, 125/105/80Msps Low Power Dual ADCs Serial SPI Port for Configuration
LTC2266-12	ADI	获取价格	12 位、80Msps 低功率双通道 ADC
LTC2266-12_15	Linear	获取价格	12-Bit, 125Msps/105Msps/ 80Msps Low Power Dual ADCs
LTC2266-14	Linear	获取价格	14-Bit, 125Msps/105Msps/80Msps Low Power Dual ADCs
LTC2266-14	ADI	获取价格	14 位、80Msps 低功率双通道 ADC
LTC2266-14_15	Linear	获取价格	14-Bit, 125Msps/105Msps/ 80Msps Low Power Dual ADCs

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