Datasheet > LTC2267-14

LTC2267-14

更新时间： 2024-11-13 14:57:59

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
32页	683K
描述
14 位、105Msps 低功率双通道 ADC

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中文翻译

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数据手册

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LTC2267-14 数据手册

LTC2268-14/

LTC2267-14/LTC2266-14

14-Bit, 125Msps/105Msps/

80Msps Low Power Dual ADCs

FeaTures

DescripTion

TheLTC^®2268-14/LTC2267-14/LTC2266-14are2-channel,

simultaneous sampling 14-bit A/D converters designed

for digitizing high frequency, wide dynamic range signals.

They are perfect for demanding communications applica-

tions with AC performance that includes 73.1dB SNR and

88dB spurious free dynamic range (SFDR). Ultralow jitter

2-Channel Simultaneous Sampling ADC

73.1dB SNR

88dB SFDR

Low Power: 299mW/243mW/203mW Total

150mW/121mW/101mW Per Channel

Single 1.8V Supply

Serial LVDS Outputs: 1 or 2 Bits Per Channel

of0.15ps

allowsundersamplingofIFfrequencieswith

RMS

Selectable Input Ranges: 1V to 2V

excellent noise performance.

P-P

800MHz Full Power Bandwidth S/H

DC specs include ±1LSB INL (typ), ±0.3LSB DNL (typ)

Shutdown and Nap Modes

and no missing codes over temperature. The transition

Serial SPI Port for Conﬁguration

noise is a low 1.2LSB

RMS

Pin Compatible 14-Bit and 12-Bit Versions

The digital outputs are serial LVDS to minimize the num-

ber of data lines. Each channel outputs two bits at a time

(2-lane mode). At lower sampling rates there is a one bit

per channel option (1-lane mode). The LVDS drivers have

optional internal termination and adjustable output levels

to ensure clean signal integrity.

40-Pin (6mm × 6mm) QFN Package

applicaTions

Communications

Cellular Base Stations

Software Deﬁned Radios

–

The ENC and ENC inputs may be driven differentially

or single-ended with a sine wave, PECL, LVDS, TTL, or

CMOS inputs. An internal clock duty cycle stabilizer al-

lows high performance at full speed for a wide range of

clock duty cycles.

Portable Medical Imaging

Multichannel Data Acquisition

Nondestructive Testing

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. All other trademarks are the property of their respective owners.

Typical applicaTion

LTC2268-14, 125Msps,

1.8V

2-Tone FFT, f_IN= 70MHz and 75MHz

–10

–20

–30

–40

CH.1

ANALOG

INPUT

OUT1A

OUT1B

14-BIT

S/H

ADC CORE

SERIALIZED

DATA

SERIALIZER

OUT2A

OUT2B

CH.2

ANALOG

INPUT

–50

–60

–70

14-BIT

ADC CORE

LVDS

OUTPUTS

DATA

CLOCK

OUT

–80

–90

ENCODE

INPUT

PLL

FRAME

–100

–110

–120

GND

OGND

FREQUENCY (MHz)

226814 TA01

226814 TA01b

22687614fa

12 3 4 5 6 7...32

中文翻译

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与LTC2267-14相关器件

型号	品牌	获取价格	描述	数据表
LTC2267-14_15	Linear	获取价格	14-Bit, 125Msps/105Msps/ 80Msps Low Power Dual ADCs
LTC2267CUJ-12PBF	Linear	获取价格	12-Bit, 125Msps/105Msps/ 80Msps Low Power Dual ADCs
LTC2267CUJ-12TRPBF	Linear	获取价格	12-Bit, 125Msps/105Msps/ 80Msps Low Power Dual ADCs
LTC2267CUJ-14	Linear	获取价格	14-Bit, 125Msps/105Msps/80Msps Low Power Dual ADCs
LTC2267CUJ-14PBF	Linear	获取价格	14-Bit, 125Msps/105Msps/80Msps Low Power Dual ADCs
LTC2267CUJ-14TRPBF	Linear	获取价格	14-Bit, 125Msps/105Msps/80Msps Low Power Dual ADCs
LTC2267IUJ-12PBF	Linear	获取价格	12-Bit, 125Msps/105Msps/ 80Msps Low Power Dual ADCs
LTC2267IUJ-12TRPBF	Linear	获取价格	12-Bit, 125Msps/105Msps/ 80Msps Low Power Dual ADCs
LTC2267IUJ-14	Linear	获取价格	14-Bit, 125Msps/105Msps/80Msps Low Power Dual ADCs
LTC2267IUJ-14#PBF	Linear	获取价格	LTC2267-14 - 14-Bit, 105Msps Low Power Dual ADCs; Package: QFN; Pins: 40; Temperature Rang

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