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LTC2201 PDF预览

LTC2201

更新时间: 2024-09-18 14:57:39
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
24页 1116K
描述
16位、20Msps ADC

LTC2201 数据手册

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LTC2201  
16-Bit, 20Msps ADC  
FEATURES  
DESCRIPTION  
Sample Rate: 20Msps  
TheLTC®2201isa20Msps,sampling16-bitA/Dconverter  
designedfordigitizinghighfrequency,widedynamicrange  
signals with input frequencies up to 380MHz. The input  
range of the ADC can be optimized with the PGA front end.  
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81.6dB SNR and 100dB SFDR (2.5V Range)  
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90dB SFDR at 70MHz (1.667V Input Range)  
PGA Front End (2.5V or 1.667V Input Range)  
380MHz Full Power Bandwidth S/H  
Optional Internal Dither  
Optional Data Output Randomizer  
Single 3.3V Supply  
P-P  
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P-P  
P-P  
The LTC2201 is perfect for demanding applications, with  
AC performance that includes 81.6dB SNR and 100dB  
spurious free dynamic range (SFDR). Maximum DC specs  
include ±±LSB ꢀNL, ±1LSB DNL (no missing codes).  
Power Dissipation: 211mW  
Clock Duty Cycle Stabilizer  
Out-of-Range ꢀndicator  
A separate output power supply allows the CMOS output  
swing to range from 0.±V to 3.6V.  
Pin Compatible Family  
Asingle-endedCLKinputcontrolsconverteroperation.An  
optionalclockdutycyclestabilizerallowshighperformance  
at full speed with a wide range of clock duty cycles.  
2±Msps: LTC2203 (16-Bit)  
10Msps: LTC2202 (16-Bit)  
48-Pin (7mm × 7mm) QFN Package  
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L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear  
Technology Corporation. All other trademarks are the property of their respective owners.  
APPLICATIONS  
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Telecommunications  
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Receivers  
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Cellular Base Stations  
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Spectrum Analysis  
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ꢀmaging Systems  
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ATE  
TYPICAL APPLICATION  
Integral Nonlinearity (INL)  
vs Output Code  
3.3V  
SENSE  
2.0  
OV  
DD  
1.2±V  
COMMON MODE  
BꢀAS VOLTAGE  
ꢀNTERNAL ADC  
REFERENCE  
GENERATOR  
V
0.±V TO 3.6V  
1.±  
CM  
1μF  
2.2μF  
1.0  
OF  
CLKOUT+  
CLKOUT–  
+
A
0.±  
ꢀN  
+
16-BꢀT  
PꢀPELꢀNED  
ADC CORE  
OUTPUT  
DRꢀVERS  
CORRECTꢀON  
LOGꢀC AND  
SHꢀFT REGꢀSTER  
ANALOG  
ꢀNPUT  
S/H  
CMOS  
OUTPUTS  
0.0  
–0.±  
–1.0  
–1.±  
–2.0  
D1±  
AMP  
t
t
A
ꢀN  
t
D0  
OGND  
CLOCK/DUTY  
CYCLE  
3.3V  
1μF  
V
DD  
CONTROL  
1μF  
1μF  
GND  
32768  
CODE  
0
16384  
491±2  
6±±36  
CLK  
2201 TA02  
PGA SHDN DꢀTH MODE  
ADC CONTROL ꢀNPUTS  
RAND  
OE  
2201 TA01  
2201f  
1

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