5秒后页面跳转
LRS1341 PDF预览

LRS1341

更新时间: 2024-09-15 22:31:03
品牌 Logo 应用领域
夏普 - SHARP 闪存存储内存集成电路静态存储器
页数 文件大小 规格书
24页 199K
描述
Stacked Chip 16M Flash Memory and 2M SRAM

LRS1341 技术参数

生命周期:Obsolete包装说明:8 X 11 MM, PLASTIC, FBGA-72
Reach Compliance Code:unknown风险等级:5.83
Is Samacsys:N其他特性:128K X 16 SRAM ALSO AVAILABLE
JESD-30 代码:R-PBGA-B72长度:11 mm
内存密度:16777216 bit内存集成电路类型:MEMORY CIRCUIT
内存宽度:16功能数量:1
端子数量:72字数:1048576 words
字数代码:1000000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-25 °C
组织:1MX16封装主体材料:PLASTIC/EPOXY
封装代码:LFBGA封装形状:RECTANGULAR
封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH认证状态:Not Qualified
座面最大高度:1.4 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:OTHER端子形式:BALL
端子节距:0.8 mm端子位置:BOTTOM
宽度:8 mmBase Number Matches:1

LRS1341 数据手册

 浏览型号LRS1341的Datasheet PDF文件第2页浏览型号LRS1341的Datasheet PDF文件第3页浏览型号LRS1341的Datasheet PDF文件第4页浏览型号LRS1341的Datasheet PDF文件第5页浏览型号LRS1341的Datasheet PDF文件第6页浏览型号LRS1341的Datasheet PDF文件第7页 
LRS1341/LRS1342  
Stacked Chip  
16M Flash Memory and 2M SRAM  
Data Sheet  
– Thirty-one 32K-word main blocks  
– Top/Bottom boot location versions  
– Extended cycling capability  
– 100,000 block erase cycles  
– Enhanced automated suspend options  
– Word write suspend to read  
FEATURES  
• Flash Memory and SRAM  
• Stacked Die Chip Scale Package  
• 72-ball CSP (FBGA072-P-0811) plastic package  
• Power supply: 2.7 V to 3.6 V  
• Operating temperature: -25°C to +85°C  
– Block erase suspend to word write  
– Block erase suspend to read  
• Flash Memory  
• SRAM  
– Access time (MAX.): 100 ns  
– Operating current (MAX.):  
The current for F-VCC pin  
– Read: 25 mA (tCYCLE = 200 ns)  
– Word write: 17 mA  
– Access time (MAX.): 85 ns  
– Operating current (MAX.):  
– 45 mA  
– 8 mA (tRC, tWC = 1 µs)  
– Standby current: 45 µA (MAX.)  
– Data retention current: 35 µA (MAX.)  
– Block erase: 17 mA  
– Deep power down current (the current for  
F-VCC pin): 10 µA (MAX. F-CE F-VCC - 0.2 V,  
F-RP -0.2 V, F-VPP 0.2 V)  
– Optimized array blocking architecture  
– Two 4K-word boot blocks  
DESCRIPTION  
The LRS1341/LRS1342 is a combination memory  
organized as 1,048,576 × 16-bit flash memory and  
131,072 × 16-bit static RAM in one package.  
– Six 4K-word parameter blocks  
PIN CONFIGURATION  
72-BALL FBGA  
INDEX  
TOP VIEW  
1
2
3
4
5
6
7
8
9
10  
11  
12  
A
B
C
D
E
F
NC  
NC  
NC  
A11  
A15  
A14  
A13  
A12 GND NC  
NC  
NC  
A16  
A8  
A10  
T1  
A9  
T3  
T4  
DQ15 S-WE DQ14 DQ7  
DQ13 DQ6 DQ4 DQ5  
F-RY/  
BY  
F-WE  
F-VCC  
GND F-RP  
T2  
DQ12 S-CE2 S-VCC  
F-WP F-VPP F-A19 DQ11  
S-LB S-UB S-OE NC  
T5  
DQ9 DQ8 DQ0 DQ1  
A3 A2 A1 S-CE1  
DQ10 DQ2 DQ3  
G
H
F-A18 F-A17  
A7  
A4  
A6  
NC  
NC  
NC  
A5  
A0 F-CE GND F-OE NC  
NC  
NC  
NOTE: Two NC pins at the corner are connected.  
LRS1342-1  
Figure 1. LRS1341/LRS1342 Pin Configuration  
Data Sheet  
1

与LRS1341相关器件

型号 品牌 获取价格 描述 数据表
LRS1342 SHARP

获取价格

Stacked Chip 16M Flash Memory and 2M SRAM
LRS1348 ETC

获取价格

Flash ROM
LRS1349 SHARP

获取价格

Memory Circuit, Flash+SRAM, Hybrid, PBGA72,
LRS1360 ETC

获取价格

Flash ROM
LRS1360C ETC

获取价格

MIXED MEMORY|SRAM+EEPROM|HYBRID|BGA|72PIN|PLASTIC
LRS1361F ETC

获取价格

MIXED MEMORY|SRAM+EEPROM|HYBRID|BGA|72PIN|PLASTIC
LRS1370 ETC

获取价格

Flash ROM
LRS1370B SHARP

获取价格

Memory Circuit, 1MX16, CMOS, PBGA72, 8 X 11 MM, PLASTIC, CSP-72
LRS1380 SANYO

获取价格

STACKED CHIP 32M (X 16) FLASH AND 4M (X 16) SRAM
LRS1380J SHARP

获取价格

STACKED CHIP 32M (X 16) BOOT BLOCK FLASH AND 4M (X 16) SRAM