LP2995LQ

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LP2995LQ 数据手册

July 2003

LP2995

DDR Termination Regulator

General Description

Features

n Low output voltage offset

n Works with +5v, +3.3v and 2.5v rails

n Source and sink current

n Low external component count

n No external resistors required

n Linear topology

The LP2995 linear regulator is designed to meet the JEDEC

SSTL-2 and SSTL-3 specifications for termination of DDR-

SDRAM. The device contains a high-speed operational am-

plifier to provide excellent response to load transients. The

output stage prevents shoot through while delivering 1.5A

continuous current and transient peaks up to 3A in the

application as required for DDR-SDRAM termination. The

LP2995 also incorporates a V_SENSEpin to provide superior

load regulation and a V_REFoutput as a reference for the

chipset and DDR DIMMS.

n Available in SO-8, PSOP-8 or LLP-16 packages

n Low cost and easy to use

Applications

n DDR Termination Voltage

n SSTL-2

Patents Pending

n SSTL-3

Typical Application Circuit

20039302

DS200393

www.national.com

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型号	品牌	获取价格	描述	数据表
LP2995LQ/NOPB	TI	获取价格	DDR Termination Regulator
LP2995LQX	NSC	获取价格	DDR Termination Regulator
LP2995M	TI	获取价格	LP2995 DDR Termination Regulator
LP2995M	NSC	获取价格	DDR Termination Regulator
LP2995M/NOPB	TI	获取价格	DDR Termination Regulator 8-SOIC 0 to 125
LP2995M/NOPB	NSC	获取价格	IC BUS TERMINATOR SUPPORT CIRCUIT, PDSO8, SOP-8, Bus Terminator
LP2995MR	NSC	获取价格	DDR Termination Regulator
LP2995MR	TI	获取价格	LP2995 DDR Termination Regulator
LP2995MR/NOPB	NSC	获取价格	IC BUS TERMINATOR SUPPORT CIRCUIT, PDSO8, PSOP-8, Bus Terminator
LP2995MR/NOPB	TI	获取价格	DDR Termination Regulator