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LMH0071 PDF预览

LMH0071

更新时间: 2024-11-11 04:19:59
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
4页 138K
描述
3G, HD, SD, DVB-ASI SDI Deserializer with Loopthrough and LVDS Interface

LMH0071 数据手册

 浏览型号LMH0071的Datasheet PDF文件第2页浏览型号LMH0071的Datasheet PDF文件第3页浏览型号LMH0071的Datasheet PDF文件第4页 
ADVANCE INFORMATION  
April 2007  
LMH0341, LMH0041, LMH0071, LMH0051  
3G, HD, SD, DVB-ASI SDI Deserializer with Loopthrough  
and LVDS Interface  
General Description  
Key Specifications  
The LMH0041 family of products provide a very simple 1:5  
deserializer and receiver function. The device is intended to  
be paired with an FPGA host which will receive the raw 5 bit  
data words and will decode the data appropriately such that  
a SMPTE standard signal may be recovered. The devices are  
designed to receive data compliant with DVB-ASI, SMPTE  
259M, SMPTE 292M and/or SMPTE 424M. The interface be-  
tween the LMH0041 and the FPGA consists of a 5 bit wide  
LVDS bus, an LVDS clock and an SMBus interface. All de-  
Output compliant with SMPTE 259M-C, SMPTE 292M,  
SMPTE 424M and DVB-ASI  
Typical power dissipation: 410 mW (loopthrough disabled)  
0.6 UI Input Jitter Tolerance  
Features  
LVDS Interface  
Dual multiplexed inputs  
vices except for the LMH0051 includes  
a reclocked  
No external VCO or clock required  
feedthrough output with a SMPTE compliant cable driver. The  
LMH0341 includes support for SMPTE424M, and the  
LMH0071 is a Stadard Definition (SD) only variant. The prod-  
uct is packaged in a physically small 48 pin LLP package.  
Loopthrough with Cable Driver  
SMBus configuration interface  
48 pin LLP package  
Applications  
SDI interfaces for:  
Video Cameras  
DVRs  
Video Switchers  
Video Editing Systems  
Block Diagram  
30017201  
© 2007 National Semiconductor Corporation  
300172  
www.national.com  

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