Datasheet > KSZ8993MLI

KSZ8993MLI

更新时间： 2024-09-16 11:32:07

品牌	Logo	应用领域
麦瑞 - MICREL		局域网（LAN）标准
页数	文件大小	规格书
86页	1084K
描述
Integrated 3-Port 10/100 Managed Switch with PHYs

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KSZ8993MLI 数据手册

KSZ8993M/ML

Integrated 3-Port 10/100 Managed

Switch with PHYs

Rev 1.06

General Description

The KSZ8993M contains two 10/100 transceivers

with patented mixed-signal low-power technology,

three media access control (MAC) units, a high-

speed non-blocking switch fabric, a dedicated

address lookup engine, and an on-chip frame buffer

memory.

The KSZ8993M, a highly integrated Layer 2

managed switch, is designed for low port count,

cost-sensitive 10/100 Mbps switch systems. It offers

an extensive feature set that includes tag/port-based

VLAN,

quality

service

(QoS)

priority,

management, management information base (MIB)

counters, MII/SNI, and CPU control/data interfaces

to effectively address both current and emerging

Fast Ethernet applications.

Both PHY units support 10BASE-T and 100BASE-

TX. In addition, one of the PHY unit supports

100BASE-FX.

The KSZ8993ML is the single supply version with all

the identical rich features of the KSZ8993M.

___________________________________________________________________________________________________

Functional Diagram

Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com

M9999-020606

October 2008

12 3 4 5 6 7...86

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KSZ8993MLI-TR	MICROCHIP	获取价格	Network Interface
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KSZ8995FQITR	MICREL	获取价格	暂无描述
KSZ8995M	MICREL	获取价格	Integrated 5-Port 10/100 Managed Switch
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