Datasheet > KSZ8993M

KSZ8993M

更新时间： 2024-11-06 03:48:51

品牌	Logo	应用领域
麦瑞 - MICREL		局域网（LAN）标准
页数	文件大小	规格书
85页	1094K
描述
Integrated 3-Port 10/100 Managed Integrated 3-Port 10/100 Managed

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中文翻译

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数据手册

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KSZ8993M 数据手册

KS8993M/ML/MI

Integrated 3-Port 10/100 Managed

Switch with PHYs

Rev 1.04

General Description

The KS8993M contains two 10/100 transceivers with

patented mixed-signal low-power technology, three

media access control (MAC) units, a high-speed

non-blocking switch fabric, a dedicated address

lookup engine, and an on-chip frame buffer memory.

The KS8993M, a highly integrated Layer 2 managed

switch, is designed for low port count, cost-sensitive

10/100 Mbps switch systems. It offers an extensive

feature set that includes tag/port-based VLAN,

quality of service (QoS) priority, management,

management information base (MIB) counters,

MII/SNI, and CPU control/data interfaces to

effectively address both current and emerging Fast

Ethernet applications.

Both PHY units support 10BASE-T and 100BASE-

TX. In addition, one of the PHY unit supports

100BASE-FX.

The KS8993ML is the single supply version with all

the identical rich features of the KS8993M.

___________________________________________________________________________________________________

Functional Diagram

1KLook-Up

Engine

10/100

T/TX/FX

PHY 1

10/100

MAC1

AUTO

MDI/MDI-X

Queue

Management

10/100

T/TX

PHY 2

10/100

MAC2

AUTO

MDI/MDI-X

Buffer

Management

10/100

MAC3

MII/SNI

Frame

Buffers

SNI

SPI

MIB

Count ers

SPI

MIIM

SMI

Cont rol

Registers

EEPROM

Interface

I C

P1 LED[3:0]

P2 LED[3:0]

LED

Drivers

Strap-In

Configuration Pins

Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com

M9999-041205

April 2005

12 3 4 5 6 7...85

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