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KM736V799T-44 PDF预览

KM736V799T-44

更新时间: 2024-11-15 14:43:03
品牌 Logo 应用领域
三星 - SAMSUNG 时钟静态存储器内存集成电路
页数 文件大小 规格书
15页 407K
描述
Cache SRAM, 128KX36, 2.8ns, CMOS, PQFP100, 20 X 14 MM, TQFP-100

KM736V799T-44 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:QFP包装说明:LQFP, QFP100,.63X.87
针数:100Reach Compliance Code:unknown
ECCN代码:3A991.B.2.AHTS代码:8542.32.00.41
风险等级:5.92Is Samacsys:N
最长访问时间:2.8 ns其他特性:PIPELINED ARCHITECTURE
最大时钟频率 (fCLK):227 MHzI/O 类型:COMMON
JESD-30 代码:R-PQFP-G100JESD-609代码:e0
长度:20 mm内存密度:4718592 bit
内存集成电路类型:CACHE SRAM内存宽度:36
功能数量:1端子数量:100
字数:131072 words字数代码:128000
工作模式:SYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:128KX36
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:LQFP封装等效代码:QFP100,.63X.87
封装形状:RECTANGULAR封装形式:FLATPACK, LOW PROFILE
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 V认证状态:Not Qualified
座面最大高度:1.6 mm最大待机电流:0.03 A
最小待机电流:3.14 V子类别:SRAMs
最大压摆率:0.52 mA最大供电电压 (Vsup):3.465 V
最小供电电压 (Vsup):3.135 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.65 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:14 mmBase Number Matches:1

KM736V799T-44 数据手册

 浏览型号KM736V799T-44的Datasheet PDF文件第2页浏览型号KM736V799T-44的Datasheet PDF文件第3页浏览型号KM736V799T-44的Datasheet PDF文件第4页浏览型号KM736V799T-44的Datasheet PDF文件第5页浏览型号KM736V799T-44的Datasheet PDF文件第6页浏览型号KM736V799T-44的Datasheet PDF文件第7页 
KM736V799  
128Kx36 Synchronous SRAM  
Document Title  
128Kx36-Bit Synchronous Pipelined Burst SRAM  
Revision History  
Remark  
Rev. No  
History  
Draft Date  
Preliminary  
Preliminary  
0.0  
0.1  
Initial draft  
April . 14. 1998  
April . 20. 1998  
Change Undershoot spec  
from -3.0V(pulse width£20ns) to -2.0V(pulse width£tCYC/2)  
Add Overshoot spec 4.6V(pulse width£tCYC/2)  
Change VIH max from 5.5V to VDD+0.5V  
Preliminary  
Preliminary  
0.2  
Change tCD from 3.2ns to 3.1ns at bin -50.  
Change tOE from 3.2ns to 3.1ns at bin -50.  
Change setup from 1.5ns to 1.4ns at bin -50.  
Change tCYC from 5.5ns to 5.4ns at bin -55.  
May . 23. 1998  
May . 25. 1998  
0.3  
Change tCD from 3.5ns to 3.1ns at bin -55.  
Change tOE from 3.5ns to 3.1ns at bin -55.  
Change setup from 1.5ns to 1.4ns at bin -55.  
.
Preliminary  
Preliminary  
0.4  
Add tCYC 175Mhz.  
Change ISB2 from 20mA to 30mA.  
May . 30. 1998  
June. 08. 1998  
0.5  
Modify DC characteristics( Input Leakage Current test Conditions)  
form VDD=VSS to VDD to Max.  
Final  
Final  
Final  
Fianl  
1.0  
2.0  
3.0  
4.0  
Final Release.  
June. 15 . 1998  
July. 10 . 1998  
Dec. 02. 1998  
Mar. 04. 1999  
Add tCYC 225Mhz.  
Add VDDQ Supply voltage( 2.5V )  
Change tCD , tOE from 3.1ns to 2.8ns at bin -44.  
Change tHZC max , tHZOE max from 3.0ns to 2.8ns at bin -44.  
Final  
Final  
Final  
5.0  
6.0  
7.0  
Add tCYC 250Mhz.  
April. 10. 1999  
May. 03. 1999  
May. 10. 1999  
Change tAH, tSH, tDH, tWH, tADVH, tCSH from 0.5ns to 0.4ns at bin -40.  
1. Change tAS, tSS, tDS, tWS, tADVS, tCSS from 1.4ns to 1.2ns at bin -44.  
2. Change tAH, tSH, tDH, tWH, tADVH, tCSH from 0.5ns to 0.4ns at bin -44.  
3. Change tAS, tSS, tDS, tWS, tADVS, tCSS from 1.2ns to 0.8ns at bin -40.  
4. Change tAH, tSH, tDH, tWH, tADVH, tCSH from 0.4ns to 0.3ns at bin -40.  
Final  
Final  
8.0  
9.0  
1. Change ISB value from 120mA to 130mA at -57  
Remove 119BGA(7x17 Ball Grid Array Package) .  
June. 24. 1999  
Nov. 26. 1999  
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the  
specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any ques-  
tions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.  
- 1 -  
November 1999  
Rev 9.0  

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