Datasheet > K4E171612C-JL50

K4E171612C-JL50

更新时间： 2024-11-06 05:15:27

品牌	Logo	应用领域
三星 - SAMSUNG		动态存储器光电二极管
页数	文件大小	规格书
35页	553K
描述
EDO DRAM, 1MX16, 50ns, CMOS, PDSO42, 0.400 INCH, PLASTIC, SOJ-42

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中文翻译

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K4E171612C-JL50 数据手册

K4E171611C, K4E151611C

K4E171612C, K4E151612C

CMOS DRAM

1M x 16Bit CMOS Dynamic RAM with Extended Data Out

DESCRIPTION

This is a family of 1,048,576 x 16 bit Extended Data Out CMOS DRAMs. Extended Data Out Mode offers high speed random access of

memory cells within the same row, so called Hyper Page Mode. Power supply voltage (+5.0V or +3.3V), refresh cycle (1K Ref. or 4K

Ref.), access time (-45, -50 or -60), power consumption(Normal or Low power) and package type(SOJ or TSOP-II) are optional features

of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-

refresh operation is available in L-version. This 1Mx16 EDO Mode DRAM family is fabricated using Samsung¢ s advanced CMOS pro-

cess to realize high band-width, low power consumption and high reliability. It may be used as graphic memory unit for microcomputer,

personal computer and portable machines.

FEATURES

• Part Identification

• Extended Data Out Mode operation

(Fast Page Mode with Extended Data Out)

• 2 CAS Byte/Word Read/Write operation

- K4E171611C-J(T)(5V, 4K Ref.)

• CAS-before-RAS refresh capability

- K4E151611C-J(T) (5V, 1K Ref.)

• RAS-only and Hidden refresh capability

• Self-refresh capability (L-ver only)

- K4E171612C-J(T)(3.3V, 4K Ref.)

- K4E151612C-J(T)(3.3V, 1K Ref.)

• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs

• Early Write or output enable controlled write

• JEDEC Standard pinout

• ActivePowerDissipation

Unit : mW

3.3V

Speed

• Available in plastic SOJ 400mil and TSOP(II) packages

• Single +5V±10% power supply (5V product)

• Single +3.3V±0.3V power supply (3.3V product)

-45

-50

-60

360

324

288

540

504

468

550

495

440

825

770

715

FUNCTIONAL BLOCK DIAGRAM

• Refresh Cycles

Part

Refresh Refresh period

VCC

RAS

UCAS

LCAS

NO.

cycle

Vcc

Vss

Normal L-ver

Control

Clocks

VBB Generator

K4E171611C

64ms

16ms

K4E171612C 3.3V

K4E151611C 5V

Lower

128ms

Data in

Buffer

DQ0

Row Decoder

Refresh Timer

Refresh Control

K4E151612C 3.3V

DQ7

Lower

Data out

Buffer

Memory Array

1,048,576 x16

Cells

Refresh Counter

Row Address Buffer

Col. Address Buffer

Upper

Data in

Buffer

• Performance Range

DQ8

DQ15

Speed

-45

Remark

tRAC

45ns

50ns

60ns

tCAC

13ns

15ns

tRC

tHPC

A0-A11

(A0 - A9)*1

A0 - A7

Upper

Data out

Buffer

69ns

84ns

16ns 5V/3.3V

20ns 5V/3.3V

Column Decoder

(A0 - A9)*1

-50

-60

17ns 104ns 25ns 5V/3.3V

Note) *1 : 1K Refresh

SAMSUNG ELECTRONICS CO., LTD. reserves the right to

change products and specifications without notice.

12 3 4 5 6 7...35

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与K4E171612C-JL50相关器件

型号	品牌	获取价格	描述	数据表
K4E171612C-JL60	SAMSUNG	获取价格	EDO DRAM, 1MX16, 60ns, CMOS, PDSO42, 0.400 INCH, PLASTIC, SOJ-42
K4E171612C-T4500	SAMSUNG	获取价格	EDO DRAM, 1MX16, 45ns, CMOS, PDSO44, TSOP2-50/44
K4E171612C-T5000	SAMSUNG	获取价格	EDO DRAM, 1MX16, 50ns, CMOS, PDSO44, TSOP2-50/44
K4E171612C-T6000	SAMSUNG	获取价格	EDO DRAM, 1MX16, 60ns, CMOS, PDSO44, TSOP2-50/44
K4E171612C-TC500	SAMSUNG	获取价格	EDO DRAM, 1MX16, 50ns, CMOS, PDSO44,
K4E171612C-TC50T	SAMSUNG	获取价格	EDO DRAM, 1MX16, 50ns, CMOS, PDSO44,
K4E171612C-TC600	SAMSUNG	获取价格	EDO DRAM, 1MX16, 60ns, CMOS, PDSO44,
K4E171612C-TL450	SAMSUNG	获取价格	EDO DRAM, 1MX16, 45ns, CMOS, PDSO44,
K4E171612C-TL45T	SAMSUNG	获取价格	EDO DRAM, 1MX16, 45ns, CMOS, PDSO44,
K4E171612C-TL50	SAMSUNG	获取价格	EDO DRAM, 1MX16, 50ns, CMOS, PDSO44, 0.400 INCH, PLASTIC, TSOP2-50/44

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