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K3P4C1000D-DC15 PDF预览

K3P4C1000D-DC15

更新时间: 2024-11-25 18:41:35
品牌 Logo 应用领域
三星 - SAMSUNG 有原始数据的样本ROM输入元件光电二极管输出元件内存集成电路
页数 文件大小 规格书
4页 66K
描述
MASK ROM, 512KX16, 150ns, CMOS, PDIP42, 0.600 INCH, DIP-42

K3P4C1000D-DC15 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP42,.6
针数:42Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.92最长访问时间:150 ns
其他特性:ALL INPUTS AND OUTPUTS TTL COMPATIBLE备用内存宽度:8
JESD-30 代码:R-PDIP-T42JESD-609代码:e0
长度:52.42 mm内存密度:8388608 bit
内存集成电路类型:MASK ROM内存宽度:16
功能数量:1端子数量:42
字数:524288 words字数代码:512000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:512KX16
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP42,.6封装形状:RECTANGULAR
封装形式:IN-LINE并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
认证状态:Not Qualified座面最大高度:5.08 mm
最大待机电流:0.00005 A子类别:MASK ROMs
最大压摆率:0.08 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:15.24 mmBase Number Matches:1

K3P4C1000D-DC15 数据手册

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K3P4C1000D-D(G)C  
CMOS MASK ROM  
8M-Bit (1Mx8 /512Kx16) CMOS MASK ROM  
FEATURES  
GENERAL DESCRIPTION  
· Switchable organization  
1,048,576 x 8(byte mode)  
524,288 x 16(word mode)  
· Fast access time  
The K3P4C1000D-D(G)C is a fully static mask programmable  
ROM fabricated using silicon gate CMOS process technology,  
and is organized either as 1,048,576 x 8 bit(byte mode) or as  
524,288 x 16 bit(word mode) depending on BHE voltage  
level.(See mode selection table)  
This device includes page read mode function, page read mode  
allows 4 words (or 8bytes) of data to read fast in the same  
page, CE and A2 ~ A18 should not be changed.  
Random Access : 100ns(Max.)  
Page Access  
: 30ns(Max.)  
· 4 Words / 8 bytes page access  
· Supply voltage : single +5V  
· Current consumption  
This device operates with a 5V single power supply, and all  
inputs and outputs are TTL compatible.  
Operating : 80mA(Max.)  
Standby : 50mA(Max.)  
· Fully static operation  
· All inputs and outputs TTL compatible  
· Three state outputs  
· Package  
-. K3P4C1000D-DC : 42-DIP-600  
-. K3P4C1000D-GC : 44-SOP-600  
Because of its asynchronous operation, it requires no external  
clock assuring extremely easy operation.  
It is suitable for use in program memory of microprocessor, and  
data memory, character generator.  
The K3P4C1000D-DC is packaged in a 42-DIP and the  
K3P4C1000D-GC in a 44-SOP.  
PIN CONFIGURATION  
FUNCTIONAL BLOCK DIAGRAM  
A18  
X
MEMORY CELL  
MATRIX  
BUFFERS  
AND  
.
.
.
.
.
.
.
.
(524,288x16/  
1,048,576x8)  
DECODER  
A18  
1
2
42 N.C  
N.C  
N.C  
A8  
N.C  
A18  
A17  
A7  
1
2
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
A17  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
CE  
A8  
41  
3
40 A9  
3
Y
4
A10  
39  
38  
SENSE AMP.  
A9  
4
BUFFERS  
AND  
5
A11  
A6  
A10  
A11  
A12  
A13  
A14  
A15  
A16  
BHE  
VSS  
Q15/A-1  
Q7  
5
6
DATA OUT  
BUFFERS  
37 A12  
36  
A5  
6
7
A13  
35 A14  
DECODER  
A2  
A4  
7
8
A3  
8
9
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
A15  
A2  
9
A0~A1  
A-1  
10  
11  
A16  
. . .  
A1  
10  
11  
12  
13  
14  
15  
16  
17  
18  
BHE  
VSS  
Q15/A-1  
Q7  
A0  
DIP  
VSS 12  
SOP  
CE  
VSS  
OE  
Q0  
Q8  
CE  
OE  
Q0  
Q8  
13  
14  
15  
Q0/Q8  
Q7/Q15  
CONTROL  
LOGIC  
OE  
Q14  
Q6  
BHE  
Q1 16  
Q14  
Q6  
Q9  
Q2  
17  
18  
19  
Q13  
Q5  
Q1  
Q9  
Pin Name  
A0 - A1  
Pin Function  
Q13  
Q10  
Q12  
Q4  
Q2 19  
26 Q5  
Q12  
Page Address Inputs  
Address Inputs  
Data Outputs  
Q3 20  
Q11  
Q10 20  
25  
24 Q4  
VCC  
21  
A2- A18  
VCC  
Q3  
21  
Q0 - Q14  
Q11  
22  
23  
Output 15(Word mode)/  
LSB Address(Byte mode)  
K3P4C1000D-DC  
Q15 /A-1  
K3P4C1000D-GC  
BHE  
CE  
Word/Byte selection  
Chip Enable  
OE  
Output Enable  
Power ( +5V)  
Ground  
VCC  
VSS  
N.C  
No Connection  

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