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IS66WV51216EBLL-55BLI PDF预览

IS66WV51216EBLL-55BLI

更新时间： 2024-09-26 19:47:47
品牌 Logo 应用领域
美国芯成 - ISSI 内存集成电路
页数 文件大小 规格书
16页 606K
描述
Pseudo Static RAM, 512KX16, 55ns, CMOS, PBGA48, 6 X 8 MM, LEAD FREE, MO-207, MINI BGA-48

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IS66WV51216EBLL-55BLI 技术参数

是否Rohs认证： 符合生命周期：Active
包装说明：TFBGA,Reach Compliance Code：compliant
Factory Lead Time：12 weeks风险等级：5.7
最长访问时间：55 nsJESD-30 代码：R-PBGA-B48
长度：8 mm内存密度：8388608 bit
内存集成电路类型：PSEUDO STATIC RAM内存宽度：16
功能数量：1端子数量：48
字数：524288 words字数代码：512000
工作模式：ASYNCHRONOUS最高工作温度：85 °C
最低工作温度：-40 °C组织：512KX16
封装主体材料：PLASTIC/EPOXY封装代码：TFBGA
封装形状：RECTANGULAR封装形式：GRID ARRAY, THIN PROFILE, FINE PITCH
并行/串行：PARALLEL峰值回流温度（摄氏度）：NOT SPECIFIED
座面最大高度：1.2 mm最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：2.5 V标称供电电压 (Vsup)：3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：BALL
端子节距：0.75 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：6 mm
Base Number Matches：1

IS66WV51216EBLL-55BLI 数据手册

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IS66WV51216EALL  
IS66/67WV51216EBLL  
OCTOBER 2015  
8Mb LOW VOLTAGE,  
ULTRA LOW POWER PSEUDO CMOS STATIC RAM  
DESCRIPTION  
Features  
The ISSI IS66WV51216EALL and IS66/67WV51216EBLL are  
high-speed,8M bit static RAMs organized as 512K words by  
16 bits. It is fabricated using ISSI’s high performance CMOS  
technology.  
High-Speed access time :  
- 70ns ( IS66WV51216EALL )  
- 60ns (IS66/67WV51216EBLL )  
CMOS Lower Power Operation  
This highly reliable process coupled with innovative circuit  
design techniques, yields high-performance and low power  
consumption devices.  
Single Power Supply  
- VDD =1.7V~1.95V( IS66WV51216EALL )  
- VDD =2.5V~3.6V (IS66/67WV51216EBLL )  
Three State Outputs  
Data Control for Upper and Lower bytes  
Lead-free Available  
When CS1# is HIGH (deselected) or when CS2 is LOW  
(deselected), the device assumes a standby mode at which  
the power dissipation can be reduced down with CMOS input  
levels.  
Easy memory expansion is provided by using Chip Enable and  
Output Enable inputs. The active LOW Write Enable (WE#)  
controls both writing and reading of the memory. A data byte  
allows Upper Byte (UB#) and Lower Byte (LB#) access.  
The IS66WV51216 EALL and IS66/67WV51216EBLL are  
packaged in the JEDEC standard 48-ball mini BGA  
(6mm x 8mm) and 44-Pin TSOP(TYPE-II). The device is also  
available for die sales.  
FUNCTIONAL BLOCK DIAGRAM  
Address  
A0~A18  
Decode Logic  
512K X 16  
DRAM  
VDD  
Memory Array  
GND  
I/O0-I/O7  
COLUMN  
I/O  
Lower Byte  
I/O DATA  
CIRCUIT  
I/O8-I/O15  
Upper Byte  
CS2  
CS1#  
OE#  
WE#  
Control  
Logic  
UB#  
LB#  
Copyright © 2015 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assu  
mes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specificatio  
n before relying on any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected  
to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution,  
Inc. receives written assurance to its satisfaction, that:  
a.) the risk of injury or damage has been minimized;  
b.) the user assume all such risks; and  
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances  
1
www.issi.com - SRAM@issi.com  
Rev. B | 10/14/2015  
1234567...16

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IS66WV51216EBLL-55BLI 替代型号

型号 品牌 替代类型 描述 数据表
IS66WV51216EBLL-55BLI-TR ISSI

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IS66WV51216EBLL-55TLI ISSI

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