Datasheet > IS62C1024

IS62C1024

更新时间： 2024-09-17 21:54:55

品牌	Logo	应用领域
矽成 - ICSI		/
页数	文件大小	规格书
8页	425K
描述
128K x 8 HIGH-SPEED CMOS STATIC RAM

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IS62C1024 数据手册

IS62C1024

128K x 8 HIGH-SPEED CMOS STATIC RAM

FEATURES

DESCRIPTION

The ICSI IS62C1024 is a low power,131,072-word by 8-bit

CMOS static RAM. It is fabricated using ICSI's high-

performance CMOS technology. This highly reliable process

coupled with innovative circuit design techniques, yields higher

performance and low power consumption devices.

• High-speed access time: 35, 45, 55, 70 ns

• Low active power: 450 mW (typical)

• Low standby power: 500 µW (typical) CMOS

standby

• Output Enable (OE) and two Chip Enable

(CE1 and CE2) inputs for ease in applications

• Fully static operation: no clock or refresh

required

When CE1 is HIGH or CE2 is LOW (deselected), the device

assumes a standby mode at which the power dissipation can

be reduced by using CMOS input levels.

Easy memory expansion is provided by using two Chip Enable

inputs, CE1 and CE2. The active LOW Write Enable (WE)

controls both writing and reading of the memory.

• TTL compatible inputs and outputs

• Single 5V (±10%) power supply

The IS62C1024 is available in 32-pin 600mil DIP, 450mil SOP

and 8*20mm TSOP-1 packages.

FUNCTIONAL BLOCK DIAGRAM

512 x 2048

MEMORY ARRAY

A0-A16

DECODER

VCC

GND

I/O

DATA

COLUMN I/O

I/O0-I/O7

CIRCUIT

CE1

CE2

CONTROL

CIRCUIT

ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors

Integrated Circuit Solution Inc.

SR016-0B

12 3 4 5 6 7 8

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