Datasheet > IS61LF102418A-7.5B3I

IS61LF102418A-7.5B3I

更新时间： 2024-10-26 04:44:47

品牌	Logo	应用领域
美国芯成 - ISSI		/
页数	文件大小	规格书
35页	277K
描述
256K x 72, 512K x 36, 1024K x 18 18Mb SYNCHRONOUS FLOW-THROUGH STATIC RAM

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IS61LF102418A-7.5B3I 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Active	零件包装代码：	BGA
包装说明：	TBGA, BGA165,11X15,40	针数：	165
Reach Compliance Code：	compliant	ECCN代码：	3A991.B.2.A
HTS代码：	8542.32.00.41	Factory Lead Time：	10 weeks
风险等级：	5.5	最长访问时间：	7.5 ns
其他特性：	PIPELINED ARCHITECTURE, FLOW-THROUGH	最大时钟频率 (fCLK)：	117 MHz
I/O 类型：	COMMON	JESD-30 代码：	R-PBGA-B165
JESD-609代码：	e0	长度：	15 mm
内存密度：	18874368 bit	内存集成电路类型：	CACHE SRAM
内存宽度：	18	功能数量：	1
端子数量：	165	字数：	1048576 words
字数代码：	1000000	工作模式：	SYNCHRONOUS
最高工作温度：	85 °C	最低工作温度：	-40 °C
组织：	1MX18	输出特性：	3-STATE
封装主体材料：	PLASTIC/EPOXY	封装代码：	TBGA
封装等效代码：	BGA165,11X15,40	封装形状：	RECTANGULAR
封装形式：	GRID ARRAY, THIN PROFILE	并行/串行：	PARALLEL
峰值回流温度（摄氏度）：	NOT SPECIFIED	电源：	2.5/3.3,3.3 V
认证状态：	Not Qualified	座面最大高度：	1.2 mm
最大待机电流：	0.075 A	最小待机电流：	3.14 V
子类别：	SRAMs	最大压摆率：	0.25 mA
最大供电电压 (Vsup)：	3.465 V	最小供电电压 (Vsup)：	3.135 V
标称供电电压 (Vsup)：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	BALL
端子节距：	1 mm	端子位置：	BOTTOM
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	13 mm
Base Number Matches：	1

IS61LF102418A-7.5B3I 数据手册

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IS61LF25672A IS61VF25672A

IS61LF51236A IS61VF51236A

IS61LF102418A IS61VF102418A

ISSI

256K x 72, 512K x 36, 1024K x 18

18Mb SYNCHRONOUS FLOW-THROUGH

STATIC RAM

APRIL 2006

DESCRIPTION

FEATURES

The ISSI IS61LF/VF25672A, IS61LF/VF51236A and

IS61LF/VF102418A are high-speed, low-power synchro-

nous static RAMs designed to provide burstable, high-

performance memory for communication and networking

applications. The IS61LF/VF25672A is organized as

262,144 words by 72 bits. The IS61LF/VF51236A is orga-

nizedas524,288wordsby36bits.TheIS61LF/VF102418A

is organized as 1,048,576 words by 18 bits. Fabricated

with ISSI's advanced CMOS technology, the device inte-

grates a 2-bit burst counter, high-speed SRAM core, and

high-drive capability outputs into a single monolithic cir-

cuit. All synchronous inputs pass through registers con-

trolled by a positive-edge-triggered single clock input.

• Internal self-timed write cycle

• Individual Byte Write Control and Global Write

• Clock controlled, registered address, data and

control

• Burst sequence control using MODE input

•

Three chip enable option for simple depth expan-

sion and address pipelining

• Common data inputs and data outputs

• Auto Power-down during deselect

• Single cycle deselect

Write cycles are internally self-timed and are initiated by

the rising edge of the clock input. Write cycles can be one

to four bytes wide as controlled by the write control inputs.

• Snooze MODE for reduced-power standby

• JTAG Boundary Scan for PBGA package

• Power Supply

Separate byte enables allow individual bytes to be written.

Byte write operation is performed by using byte write

enable (BWE) input combined with one or more individual

byte write signals (BWx). In addition, Global Write (GW) is

available for writing all bytes at one time, regardless of the

byte write controls.

LF: V^DD3.3V + 5%, VDDQ 3.3V/2.5V + 5%

VF: V^DD2.5V + 5%, VDDQ 2.5V + 5%

• JEDEC 100-Pin TQFP, 119-pin PBGA, 209-Ball

PBGA and 165-pin PBGA packages.

Bursts can be initiated with either ADSP (Address Status

Processor) or ADSC (Address Status Cache Controller)

input pins. Subsequent burst addresses can be generated

internally and controlled by the ADV (burst address ad-

vance) input pin.

• Lead-free available

The mode pin is used to select the burst sequence order,

Linear burst is achieved when this pin is tied LOW.

Interleave burst is achieved when this pin is tied HIGH or

left floating.

FAST ACCESS TIME

Symbol

tKQ

Parameter

-6.5

6.5

-7.5

7.5

Units

Clock Access Time

Cycle Time

tKC

7.5

8.5

Frequency

133

117

MHz

without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to

obtain the latest version of this device specification before relying on any published information and before placing orders for products.

Integrated Silicon Solution, Inc. — 1-800-379-4774

Rev. E

04/21/06

12 3 4 5 6 7...35

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与IS61LF102418A-7.5B3I相关器件

型号	品牌	获取价格	描述	数据表
IS61LF102418A-7.5B3-TR	ISSI	获取价格	IC SRAM 18M PARALLEL 165TFBGA
IS61LF102418A-7.5TQ	ISSI	获取价格	256K x 72, 512K x 36, 1024K x 18 18Mb SYNCHRONOUS FLOW-THROUGH STATIC RAM
IS61LF102418A-7.5TQI	ISSI	获取价格	256K x 72, 512K x 36, 1024K x 18 18Mb SYNCHRONOUS FLOW-THROUGH STATIC RAM
IS61LF102418A-7.5TQLI	ISSI	获取价格	256K x 72, 512K x 36, 1024K x 18 18Mb SYNCHRONOUS FLOW-THROUGH STATIC RAM
IS61LF102418A-7.5TQLI-TR	ISSI	获取价格	IC SRAM 18M PARALLEL 100TQFP
IS61LF102418B-6.5TQLI-TR	ISSI	获取价格	IC SRAM 18M PARALLEL 133MHZ
IS61LF102418B-7.5TQLI	ISSI	获取价格	IC SRAM 18M PARALLEL 100LQFP
IS61LF102436A	ISSI	获取价格	36Mb SYNCHRONOUS FLOW-THROUGH STATIC RAM
IS61LF102436A-6.5B3	ISSI	获取价格	36Mb SYNCHRONOUS FLOW-THROUGH STATIC RAM
IS61LF102436A-6.5B3I	ISSI	获取价格	36Mb SYNCHRONOUS FLOW-THROUGH STATIC RAM

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