5秒后页面跳转
IS49NLS18320 PDF预览

IS49NLS18320

更新时间: 2024-01-28 21:34:37
品牌 Logo 应用领域
美国芯成 - ISSI 动态存储器
页数 文件大小 规格书
34页 575K
描述
576Mb (x9, x18) Separate I/O RLDRAM 2 Memory

IS49NLS18320 数据手册

 浏览型号IS49NLS18320的Datasheet PDF文件第2页浏览型号IS49NLS18320的Datasheet PDF文件第3页浏览型号IS49NLS18320的Datasheet PDF文件第4页浏览型号IS49NLS18320的Datasheet PDF文件第5页浏览型号IS49NLS18320的Datasheet PDF文件第6页浏览型号IS49NLS18320的Datasheet PDF文件第7页 
IS49NLS96400,IS49NLS18320  
576Mb (x9, x18) Separate I/O RLDRAM2 Memory  
ADVANCED INFORMATION  
JULY 2012  
FEATURES  
533MHz DDR operation (1.067 Gb/s/pin data  
rate)  
Data mask signals (DM) to mask signal of  
WRITE data; DM is sampled on both edges of  
DK.  
Differential input clocks (CK, CK#)  
Differential input data clocks (DKx, DKx#)  
Ondie DLL generates CK edgealigned data and  
output data clock signals  
38.4 Gb/s peak bandwidth (x18 Separate I/O at  
533 MHz clock frequency)  
Reduced cycle time (15ns at 533MHz)  
32ms refresh (16K refresh for each bank; 128K  
refresh command must be issued in total each  
32ms)  
Data valid signal (QVLD)  
8 internal banks  
HSTL I/O (1.5V or 1.8V nominal)  
2560Ω matched impedance outputs  
2.5V VEXT, 1.8V VDD, 1.5V or 1.8V VDDQ I/O  
Ondie termination (ODT) RTT  
IEEE 1149.1 compliant JTAG boundary scan  
Operating temperature:  
Commercial  
(TC = 0° to +95°C; TA = 0°C to +70°C),  
Industrial  
Nonmultiplexed addresses (address  
multiplexing option available)  
SRAMtype interface  
Programmable READ latency (RL), row cycle  
time, and burst sequence length  
Balanced READ and WRITE latencies in order to  
optimize data bus utilization  
(TC = 40°C to +95°C; TA = 40°C to +85°C)  
OPTIONS  
Package:  
144ball FBGA (leaded)  
144ball FBGA (leadfree)  
Configuration:  
64Mx9  
32Mx18  
Clock Cycle Timing:  
Speed Grade  
18  
15  
25E  
15  
25  
20  
33  
20  
Unit  
ns  
tRC  
tCK  
1.875  
2.5  
2.5  
3.3  
ns  
Copyright © 2012 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without  
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the  
latest version of this device specification before relying on any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can  
reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such  
applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:  
a.) the risk of injury or damage has been minimized;  
b.) the user assume all such risks; and  
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances  
RLDRAMis a registered trademark of Micron Technology, Inc.  
Integrated Silicon Solution, Inc. – www.issi.com –  
Rev. 00E, 06/20/2012  
1

与IS49NLS18320相关器件

型号 品牌 获取价格 描述 数据表
IS49NLS18320-18B ISSI

获取价格

DDR DRAM, 32MX18, 1.875ns, CMOS, PBGA144, 11 X 18.50 MM, FBGA-144
IS49NLS18320-18BLI ISSI

获取价格

DDR DRAM, 32MX18, 1.875ns, CMOS, PBGA144, 11 X 18.50 MM, LEAD FREE, FBGA-144
IS49NLS18320A ISSI

获取价格

8 internal banks
IS49NLS18320A-18EB ISSI

获取价格

DDR DRAM, 32MX18, CMOS, PBGA144, FBGA-144
IS49NLS18320A-18EBI ISSI

获取价格

DDR DRAM, 32MX18, CMOS, PBGA144, FBGA-144
IS49NLS18320A-18EBLI ISSI

获取价格

DDR DRAM, 32MX18, CMOS, PBGA144, FBGA-144
IS49NLS18320A-25WBL ISSI

获取价格

DDR DRAM, 32MX18, CMOS, PBGA144, WBGA-144
IS49NLS18320A-33WBL ISSI

获取价格

DDR DRAM, 32MX18, CMOS, PBGA144, WBGA-144
IS49NLS93200 ISSI

获取价格

288Mb (x9, x18) Separate I/O RLDRAM 2 Memory
IS49NLS93200-25B ISSI

获取价格

IC DRAM 288M PARALLEL 144FCBGA