Datasheet > IS49NLS18320A

IS49NLS18320A

更新时间： 2024-01-18 03:25:55

品牌	Logo	应用领域
美国芯成 - ISSI		/
页数	文件大小	规格书
36页	978K
描述
8 internal banks

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中文翻译

获取价格

数据手册

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IS49NLS18320A 数据手册

IS49NLS96400A, IS49NLS18320A

576Mb (64Mbx9, 32Mbx18)

Seperate I/O RLDRAM^2 Memory

ADVANCED INFORMATION

SEPTEMBER 2014

FEATURES



533MHz DDR operation (1.067 Gb/s/pin data rate)

38.4Gb/s peak bandwidth (x18 at 533 MHz clock

frequency)

Reduced cycle time (15ns at 533MHz)

32ms refresh (16K refresh for each bank; 128K

refresh command must be issued in total each

32ms)

8 internal banks

Non-multiplexed addresses (address

multiplexing option available)



Differential input clocks (CK, CK#)

Differential input data clocks (DKx, DKx#)

On-die DLL generates CK edge-aligned data

and output data clock signals

Data valid signal (QVLD)

HSTL I/O (1.5V or 1.8V nominal)

25-60Ω matched impedance outputs

2.5V V_EXT, 1.8V V_DD, 1.5V or 1.8V V_DDQI/O

On-die termination (ODT) R_TT

IEEE 1149.1 compliant JTAG boundary scan

Operating temperature:



SRAM-type interface

Programmable READ latency (RL), row cycle

time, and burst sequence length

Balanced READ and WRITE latencies in order

to optimize data bus utilization

Data mask signals (DM) to mask signal of

WRITE data; DM is sampled on both edges of

DK.

Commercial

(T_C= 0° to +95°C)

Industrial



(T_C= -40°C to +95°C; T_A= -40°C to +85°C)

OPTIONS



Package:



144-ball FBGA (leaded)

144-ball FBGA (lead-free)

Configuration:



64Mx9

32Mx18

Clock Cycle Timing:

Speed Grade

-18

-25E

-25

-33

Unit

t_RC

t_CK

1.875

2.5

3.3

any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein.

Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for

products.

Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the

product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not

authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:

a.) the risk of injury or damage has been minimized;

b.) the user assume all such risks; and

c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances

RLDRAM^is a registered trademark of Micron Technology, Inc.

Integrated Silicon Solution, Inc. – www.issi.com –

Rev. 00A, 9/10/2014

12 3 4 5 6 7...36

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与IS49NLS18320A相关器件

型号	品牌	获取价格	描述	数据表
IS49NLS18320A-18EB	ISSI	获取价格	DDR DRAM, 32MX18, CMOS, PBGA144, FBGA-144
IS49NLS18320A-18EBI	ISSI	获取价格	DDR DRAM, 32MX18, CMOS, PBGA144, FBGA-144
IS49NLS18320A-18EBLI	ISSI	获取价格	DDR DRAM, 32MX18, CMOS, PBGA144, FBGA-144
IS49NLS18320A-25WBL	ISSI	获取价格	DDR DRAM, 32MX18, CMOS, PBGA144, WBGA-144
IS49NLS18320A-33WBL	ISSI	获取价格	DDR DRAM, 32MX18, CMOS, PBGA144, WBGA-144
IS49NLS93200	ISSI	获取价格	288Mb (x9, x18) Separate I/O RLDRAM 2 Memory
IS49NLS93200-25B	ISSI	获取价格	IC DRAM 288M PARALLEL 144FCBGA
IS49NLS93200-25BI	ISSI	获取价格	IC DRAM 288M PARALLEL 144FCBGA
IS49NLS93200-25BL	ISSI	获取价格	IC DRAM 288M PARALLEL 144FCBGA
IS49NLS93200-25BLI	ISSI	获取价格	IC DRAM 288M PARALLEL 144FCBGA

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