Datasheet > 存储 > DRAM> IS42S16400D-7T

IS42S16400D-7T

更新时间： 2024-11-06 04:44:43

品牌	Logo	应用领域
美国芯成 - ISSI		/
页数	文件大小	规格书
57页	563K
描述
1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

IS42S16400D-7T 数据手册

IS42S16400D

ISSI

1 Meg Bits x 16 Bits x 4 Banks (64-MBIT)

SYNCHRONOUS DYNAMIC RAM

JULY 2006

FEATURES

OVERVIEW

ISSI's64MbSynchronousDRAMIS42S16400Disorganized

as1,048,576bitsx16-bitx4-bankforimprovedperformance.

The synchronous DRAMs achieve high-speed data transfer

using pipeline architecture. All inputs and outputs signals

refer to the rising edge of the clock input.

• Clock frequency: 166, 143 MHz

• Fully synchronous; all signals referenced to a

positive clock edge

• Internal bank for hiding row access/precharge

• Single 3.3V power supply

• LVTTL interface

PIN CONFIGURATIONS

54-Pin TSOP (Type II)

• Programmable burst length

– (1, 2, 4, 8, full page)

VDD

DQ0

VDDQ

DQ1

DQ2

GNDQ

DQ3

DQ4

VDDQ

DQ5

DQ6

GNDQ

DQ7

VDD

LDQM

GND

DQ15

GNDQ

DQ14

DQ13

VDDQ

DQ12

DQ11

GNDQ

DQ10

DQ9

VDDQ

DQ8

GND

• Programmable burst sequence:

Sequential/Interleave

• Self refresh modes

• 4096 refresh cycles every 64 ms

• Random column address every clock cycle

• Programmable CAS latency (2, 3 clocks)

• Burst read/write and burst read/single write

operations capability

UDQM

CLK

CKE

CAS

RAS

• Burst termination by burst stop and precharge

command

BA0

BA1

A10

A11

• Byte controlled by LDQM and UDQM

• Industrial temperature availability

• Package: 400-mil 54-pin TSOP II, 60-ball fBGA

• Lead-free package is available

VDD

GND

PIN DESCRIPTIONS

WriteEnable

A0-A11

BA0, BA1

DQ0 to DQ15

CLK

Address Input

LDQM

UDQM

VDD

Lower Bye, Input/Output Mask

Upper Bye, Input/Output Mask

Power

Bank Select Address

Data I/O

System Clock Input

Clock Enable

GND

VDDQ

GNDQ

Ground

CKE

Power Supply for DQ Pin

Ground for DQ Pin

NoConnection

Chip Select

RAS

RowAddressStrobeCommand

ColumnAddressStrobeCommand

CAS

liabilityarisingoutoftheapplicationoruseofanyinformation, productsorservicesdescribedherein. Customersareadvisedtoobtainthelatestversionofthisdevicespecificationbeforerelyingon

anypublishedinformationandbeforeplacingordersforproducts.

Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774

Rev. C

07/05/06

12 3 4 5 6 7...57

中文翻译

下载PDF

与IS42S16400D-7T相关器件

型号	品牌	获取价格	描述	数据表
IS42S16400D-7TI	ISSI	获取价格	1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
IS42S16400D-7TL	ISSI	获取价格	1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
IS42S16400D-7TLI	ISSI	获取价格	1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
IS42S16400D-7TLI-TR	ISSI	获取价格	Synchronous DRAM, 4MX16, 7ns, CMOS, PDSO54, 0.400 INCH, LEAD FREE, PLASTIC, TSOP2-54
IS42S16400D-7TL-TR	ISSI	获取价格	暂无描述
IS42S16400E	ISSI	获取价格	1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
IS42S16400E-6T	ISSI	获取价格	1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
IS42S16400E-6TL	ISSI	获取价格	1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
IS42S16400E-6TLI	ISSI	获取价格	1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
IS42S16400E-7T	ISSI	获取价格	1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM

与IS42S16400D-7T相关文章

英伟达新AI芯片Rubin或提前半年亮相
2024-11-05

14
苹果iPhone 17将全系采用三星/LG显示LTPO OLED面板
2024-11-05

12
三星深化印度制造布局，供应链本地化进程加速
2024-10-29

36
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
2024-10-29

33

产品中心

服务支持

精选活动

关于我们

帮助中心

IS42S16400D-7T

IS42S16400D-7T 数据手册

与IS42S16400D-7T相关器件

与IS42S16400D-7T相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

IS42S16400D-7T

IS42S16400D-7T 数据手册

与IS42S16400D-7T相关器件

与IS42S16400D-7T相关文章

您还可以找

您在本页遇到什么问题？