November 2001
IRFW840B / IRFI840B
500V N-Channel MOSFET
General Description
Features
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supplies,
power factor correction and electronic lamp ballasts based
on half bridge.
•
•
•
•
•
•
8.0A, 500V, R
= 0.8Ω @V = 10 V
DS(on) GS
Low gate charge ( typical 41 nC)
Low Crss ( typical 35 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
D
!
D
●
◀
▲
●
●
G!
D2-PAK
IRFW Series
I2-PAK
IRFI Series
G
S
G D S
!
S
Absolute Maximum Ratings
T = 25°C unless otherwise noted
C
Symbol
Parameter
IRFW840B / IRFI840B
Units
V
V
I
Drain-Source Voltage
500
8.0
DSS
- Continuous (T = 25°C)
Drain Current
A
D
C
- Continuous (T = 100°C)
5.1
A
C
I
(Note 1)
Drain Current
- Pulsed
32
A
DM
V
E
I
Gate-Source Voltage
± 30
320
V
GSS
AS
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Single Pulsed Avalanche Energy
Avalanche Current
mJ
A
8.0
AR
E
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
13.4
5.5
mJ
V/ns
W
AR
dv/dt
Power Dissipation (T = 25°C) *
3.13
134
P
A
D
Power Dissipation (T = 25°C)
W
C
- Derate above 25°C
Operating and Storage Temperature Range
1.08
-55 to +150
W/°C
°C
T , T
J
stg
Maximum lead temperature for soldering purposes,
T
300
°C
L
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
Parameter
Typ
--
Max
0.93
40
Units
°C/W
°C/W
°C/W
R
R
R
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
θJC
θJA
θJA
--
--
62.5
* When mounted on the minimum pad size recommended (PCB Mount)
©2001 Fairchild Semiconductor Corporation
Rev. B, November 2001