Datasheet > IDTQS53805SO8

IDTQS53805SO8

更新时间： 2024-12-02 09:23:07

品牌	Logo	应用领域
艾迪悌 - IDT		光电二极管
页数	文件大小	规格书
6页	96K
描述
Low Skew Clock Driver, 5 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, SOIC-20

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IDTQS53805SO8 数据手册

QS53805/A

GUARANTEEDLOWSKEW3.3VCMOSCLOCKDRIVER/BUFFER

INDUSTRIALTEMPERATURERANGE

GUARANTEED LOW SKEW

QS53805/A

3.3V CMOS CLOCK

DRIVER/BUFFER

FEATURES:

DESCRIPTION

−

10 output, low skew clock signal buffer

Pinout and function compatible with QS5805T

JEDEC compatible LVTTL inputs and outputs

Input hysteresis for better noise margin

Monitor output

TheQS53805clockbuffer/drivercircuitscanbeusedforclockbuffering

schemeswherelowskewisakeyparameter.Thisdeviceofferstwobanks

of5non-invertingoutputs.TheQS53805deviceprovideslowpropagation

delaybufferingwithon-chipskewof0.7nsforsame-transition,same-bank

signals.This clockbufferproductis designedforuseinhighperformance

workstations,embeddedandpersonalcomputingsystemsusing3Vto3.6V

supplyvoltages.Severalcanbe usedinparallelorscatteredthroughout

a system for guaranteed low skew, system-wide clock distribution net-

works. The QS53805 can accept 5V input and control signals.

Guaranteed low skew:

•

0.7ns output skew

1.1ns pulse skew

1ns part-to-part skew

−

Clock inputs are 5V tolerant

Std. and A speed grades

Available in QSOP and SOIC packages

The QS53805 is characterized for operation at -40°C to +85°C.

FUNCTIONALBLOCKDIAGRAM

OEA

INA

OA5 OA1

MON

INB

OB5 OB1

OEB

INDUSTRIAL TEMPERATURE RANGE

JULY 2000

1999 Integrated Device Technology, Inc.

DSC-5842/-

12 3 4 5 6

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IDTQS5917T-100TJ	IDT	获取价格	PLL Based Clock Driver, 5917 Series, 7 True Output(s), 1 Inverted Output(s), CMOS, PQCC28,
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