Datasheet > IDTQS5LV931-50Q8

IDTQS5LV931-50Q8

更新时间： 2023-02-15 00:00:00

品牌	Logo	应用领域
艾迪悌 - IDT		光电二极管
页数	文件大小	规格书
7页	49K
描述
PLL Based Clock Driver, 6 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, QSOP-20

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IDTQS5LV931-50Q8 数据手册

QS5LV931

3.3V Low Skew CMOS

PLL Clock Driver With

Integrated Loop Filter

UALITY

EMICONDUCTOR, NC.

FEATURES/BENEFITS

DESCRIPTION

• JEDEC LVTTL compatible level

• Clock input is 5V tolerant

• Q outputs, Q/2 output

• < 300ps output skew, Q0-Q4

• Outputs 3-state and reset while OE/RST low

• PLL disable feature for low frequency testing

• Internal loop filter RC network

• Internal VCO/2 option

• Balanced drive outputs ± 24mA

• 80MHz maximum frequency

• Industrial temperature range

• Available in space saving QSOP package

The QS5LV931 Clock Driver uses an internal phase

locked loop (PLL) to lock low skew outputs to a

reference clock input. Six outputs are available:

Q0-Q4, Q/2. Careful layout and design ensure

< 300ps skew between the Q0-Q4, and Q/2 outputs.

The QS5LV931 includes an internal RC filter which

provides excellent jitter characteristics and eliminates

the need for external components. Various combina-

tions of feedback and a divide-by-2 in the VCO path

allow applications to be customized for linear VCO

operation over a wide range of input SYNC frequen-

cies. The PLL can also be disabled by the PLL_EN

signal to allow low frequency or DC testing. The

QS5LV931 is designed for use in cost sensitive high-

performancecomputingsystems,workstations,multi-

board computers, networking hardware, and main-

frame systems. Several can be used in parallel or

scattered throughout a system for guaranteed low

skew, system-wide clock distribution networks. In the

QSOP package, the QS5LV931 clock driver repre-

sents the best value in small form factor, high-perfor-

mance clock management products.

For more information on PLL clock driver products,

see Application Note AN-22A.

Figure 1. Functional Block Diagram

FEEDBACK

PLL_EN

FREQ_SEL

SYNC

OE/RST

PHASE

DETECTOR

LOOP

FILTER

VCO

Q/2

MDSC-00022-00

QUALITY SEMICONDUCTOR, INC.

DECEMBER 15, 1997

12 3 4 5 6 7

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与IDTQS5LV931-50Q8相关器件

型号	品牌	获取价格	描述	数据表
IDTQS5LV931-66Q	IDT	获取价格	PLL Based Clock Driver, 5LV Series, 6 True Output(s), 0 Inverted Output(s), CMOS, PDSO20,
IDTQS5LV931-66Q8	IDT	获取价格	PLL Based Clock Driver, 6 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, QSOP-20
IDTQS5LV931-80Q	IDT	获取价格	PLL Based Clock Driver, 5LV Series, 6 True Output(s), 0 Inverted Output(s), CMOS, PDSO20,
IDTQS5LV931-80Q8	IDT	获取价格	PLL Based Clock Driver, 6 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, QSOP-20
IDTQS74153ATQ	IDT	获取价格	HIGH-SPEED CMOS DUAL 4-INPUT MULTIPLEXER
IDTQS74153ATSO	IDT	获取价格	HIGH-SPEED CMOS DUAL 4-INPUT MULTIPLEXER
IDTQS74153CTQ	IDT	获取价格	HIGH-SPEED CMOS DUAL 4-INPUT MULTIPLEXER
IDTQS74153CTSO	IDT	获取价格	HIGH-SPEED CMOS DUAL 4-INPUT MULTIPLEXER
IDTQS74253ATQ	ETC	获取价格	4-Input Digital Multiplexer
IDTQS74253ATS1	ETC	获取价格	4-Input Digital Multiplexer

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