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IDT74FCT163501APAG PDF预览

IDT74FCT163501APAG

更新时间: 2024-09-15 19:59:43
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
7页 75K
描述
Registered Bus Transceiver, FCT Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, TSSOP-56

IDT74FCT163501APAG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP-56针数:56
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.65其他特性:WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
系列:FCTJESD-30 代码:R-PDSO-G56
JESD-609代码:e3长度:14 mm
负载电容(CL):50 pF逻辑集成电路类型:REGISTERED BUS TRANSCEIVER
湿度敏感等级:1位数:18
功能数量:1端口数量:2
端子数量:56最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
传播延迟(tpd):5.6 ns认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:6.1 mmBase Number Matches:1

IDT74FCT163501APAG 数据手册

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3.3V CMOS 18-BIT  
REGISTERED TRANSCEIVER  
IDT74FCT163501A/C  
DESCRIPTION:  
FEATURES:  
TheFCT16350118-bitregisteredtransceiversarebuiltusingadvanced  
dual metal CMOS technology. These high-speed, low-power 18-bit  
registeredbustransceiverscombineD-typelatchesandD-typeflip-flopsto  
allowdataflowintransparent,latchedandclockedmodes. Dataflowineach  
directionis controlledbyoutput-enable (OEABandOEBA), latchenable  
(LEABandLEBA)andclock(CLKABandCLKBA)inputs. ForA-to-Bdata  
flow,the device operates intransparentmode whenLEABis high. When  
LEABislow,theAdataislatchedifCLKABisheldatahighorlowlogiclevel.  
IfLEABislow,theAbusdataisstoredinthelatch/flip-floponthelow-to-high  
transitionofCLKAB. OEABperformstheoutputenablefunctionontheBport.  
Data flowfromBporttoAportis similiarbutrequires using OEBA,LEBA  
andCLKBA. Flow-throughorganizationofsignalpinssimplifieslayout. All  
inputs are designedwithhysteresis forimprovednoise margin.  
• 0.5 MICRON CMOS Technology  
Typical tSK(o) (Output Skew) < 250ps  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
VCC = 3.3V ± 0.3V, Normal Range, or VCC = 2.7V to 3.6V, Extended  
Range  
• CMOS power levels (0.4μ W typ. static)  
• Rail-to-rail output swing for increased noise margin  
Low Ground Bounce (0.3V typ.)  
Inputs (except I/O) can be driven by 3.3V or 5V components  
Available in SSOP, TSSOP, and TVSOP packages  
The FCT163501 has series current limiting resistors. These offer low  
ground bounce, minimal undershoot, and controlled output fall times-  
reducingthe needforexternalseries terminatingresistors.  
FUNCTIONALBLOCKDIAGRAM  
1
OEAB  
30  
CLKBA  
28  
LEBA  
27  
OEBA  
55  
CLKAB  
2
LEAB  
C
C
54  
B1  
3
D
A1  
D
C
D
C
D
TO 17 OTHER CHANNELS  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
APRIL 2002  
1
© 2002 Integrated Device Technology, Inc.  
DSC-2776/7  

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