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IDT74FCT163501CPAG PDF预览

IDT74FCT163501CPAG

更新时间: 2024-09-15 13:08:43
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
7页 115K
描述
Registered Bus Transceiver, FCT Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, TSSOP-56

IDT74FCT163501CPAG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP-56针数:56
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.65其他特性:WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
系列:FCTJESD-30 代码:R-PDSO-G56
JESD-609代码:e3长度:14 mm
负载电容(CL):50 pF逻辑集成电路类型:REGISTERED BUS TRANSCEIVER
湿度敏感等级:1位数:18
功能数量:1端口数量:2
端子数量:56最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
传播延迟(tpd):5.3 ns认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:6.1 mmBase Number Matches:1

IDT74FCT163501CPAG 数据手册

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IDT74FCT163501/A/C  
3.3V CMOS  
18-BIT REGISTERED  
TRANSCEIVER  
Integrated Device Technology, Inc.  
FEATURES:  
• 0.5 MICRON CMOS Technology  
high-speed, low-power 18-bit registered bus transceivers  
combineD-typelatchesandD-typeflip-flopstoallowdataflow  
in transparent, latched and clocked modes. Data flow in each  
direction is controlled by output-enable (OEAB and OEBA),  
latchenable(LEABandLEBA)andclock(CLKABandCLKBA)  
inputs. For A-to-B data flow, the device operates in transpar-  
ent mode when LEAB is HIGH. When LEAB is LOW, the A  
data is latched if CLKAB is held at a HIGH or LOW logic level.  
If LEAB is LOW, the A bus data is stored in the latch/flip-flop  
on the LOW-to-HIGH transition of CLKAB. OEAB performs  
the output enable function on the B port. Data flow from B port  
to A port is similiar but requires using OEBA, LEBA and  
CLKBA. Flow-through organization of signal pins simplifies  
layout. All inputs are designed with hysteresis for improved  
noise margin.  
Typical tSK(o) (Output Skew) < 250ps  
• ESD > 2000V per MIL-STD-883, Method 3015;  
> 200V using machine model (C = 200pF, R = 0)  
• Packages include 25 mil pitch SSOP, 19.6 mil pitch  
TSSOP and 15.7 mil pitch TVSOP  
• Extended commercial range of -40°C to +85°C  
• VCC = 3.3V ±0.3V, Normal Range or  
VCC = 2.7 to 3.6V, Extended Range  
• CMOS power levels (0.4µW typ. static)  
• Rail-to-Rail output swing for increased noise margin  
• Low Ground Bounce (0.3V typ.)  
• Inputs (except I/O) can be driven by 3.3V or 5V  
components  
The FCT163501/A/C have series current limiting resistors.  
These offer low ground bounce, minimal undershoot, and  
controlled output fall times-reducing the need for external  
series terminating resistors.  
DESCRIPTION:  
The FCT163501/A/C 18-bit registered transceivers are  
built using advanced dual metal CMOS technology. These  
FUNCTIONAL BLOCK DIAGRAM  
OEAB  
CLKBA  
LEBA  
OEBA  
CLKAB  
LEAB  
C
C
B1  
A1  
D
D
C
D
C
D
TO 17 OTHER CHANNELS  
2776drw01  
The IDT logo is a registered trademark of Integrated Device Technology, Inc.  
COMMERCIAL TEMPERATURE RANGE  
1996 Integrated Device Technology, Inc.  
AUGUST 1996  
8.6  
DSC-2776/4  
1

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