3.3 VOLT CMOS ASYNCHRONOUS FIFO
512 x 9, 1,024 x 9,
2,048 x 9, 4,096 x 9,
IDT72V01, IDT72V02
IDT72V03, IDT72V04
IDT72V05, IDT72V06
8,192 x 9, 16,384 x 9
FEATURES:
DESCRIPTION:
• 3.3V family uses less power than the 5 Volt 7201/7202/7203/7204/
7205/7206family
• 512 x 9 organization (72V01)
• 1,024 x 9 organization (72V02)
• 2,048 x 9 organization (72V03)
• 4,096 X 9 organization (72V04)
• 8,192 x 9 organization (72V05)
• 16,384 X 9 organization (72V06)
• Functionally compatible with 720x family
• Low-power consumption
— Active: 180 mW (max.)
— Power-down: 18 mW (max.)
• 15 ns access time
• Asynchronous and simultaneous read and write
• Fully expandable by both word depth and/or bit width
• Status Flags: Empty, Half-Full, Full
• Auto-retransmit capability
The IDT72V01/72V02/72V03/72V04/72V05/72V06 are dual-port FIFO
memoriesthatoperateatapowersupplyvoltage(Vcc)between3.0Vand3.6V.
Theirarchitecture,functionaloperationandpinassignmentsareidenticalto
those ofthe IDT7201/7202/7203/7204/7205/7206. These devices loadand
emptydataonafirst-in/first-outbasis.TheyuseFullandEmptyflagstoprevent
data overflow and underflow and expansion logic to allow for unlimited
expansioncapabilityinbothwordsize anddepth.
The reads and writes are internally sequential through the use of ring
pointers,withnoaddressinformationrequiredtoloadandunloaddata.Data
istoggledinandoutofthedevicesthroughtheuseoftheWrite(W)andRead
(R)pins. The devices have a maximumdata access time as fastas 25ns.
Thedevicesutilizea9-bitwidedataarraytoallowforcontrolandparitybits
attheuser’soption.Thisfeatureisespeciallyusefulindatacommunications
applicationswhereitisnecessarytouseaparitybitfortransmission/reception
errorchecking.TheyalsofeatureaRetransmit(RT)capabilitythatallowsfor
resetofthereadpointertoitsinitialpositionwhenRTispulsedLOWtoallowfor
retransmissionfromthebeginningofdata.AHalf-FullFlagisavailableinthe
singledevicemodeandwidthexpansionmodes.
• Available in 32-pin PLCC
•
Industrial temperature range (–40
°
C to +85
°
C) is available
TheseFIFOsarefabricatedusingIDT’shigh-speedCMOStechnology.It
hasbeendesignedforthoseapplicationsrequiringasynchronousandsimul-
taneousread/writesinmultiprocessingandratebufferapplications.
FUNCTIONAL BLOCK DIAGRAM
DATA INPUTS
(D0-D8)
WRITE
CONTROL
W
RAM
ARRAY
512 x 9
1,024 x 9
2,048 x 9
4,096 x 9
8,192 x 9
16,384 x 9
WRITE
POINTER
READ
POINTER
THREE-
STATE
BUFFERS
RS
DATA OUTPUTS
READ
CONTROL
(Q0-Q8)
RESET
LOGIC
R
FLAG
LOGIC
EF
FF
FL/RT
EXPANSION
LOGIC
XI
XO/HF
3033 drw 01
IDTandtheIDTlogoareregisteredtrademarksofIntegratedDeviceTechnology,Inc
MAY 2003
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
1
2003 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
DSC-3033/3