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IDT71342LA25JI PDF预览

IDT71342LA25JI

更新时间: 2024-11-23 05:12:07
品牌 Logo 应用领域
艾迪悌 - IDT 存储内存集成电路静态存储器
页数 文件大小 规格书
14页 132K
描述
HIGH SPEED 4K X 8 DUAL-PORT STATIC RAM WITH SEMAPHORE

IDT71342LA25JI 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Obsolete零件包装代码:LCC
包装说明:PLASTIC, LCC-52针数:52
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.27
Is Samacsys:N最长访问时间:25 ns
I/O 类型:COMMONJESD-30 代码:S-PQCC-J52
JESD-609代码:e0长度:19.1262 mm
内存密度:32768 bit内存集成电路类型:DUAL-PORT SRAM
内存宽度:8湿度敏感等级:3
功能数量:1端口数量:2
端子数量:52字数:4096 words
字数代码:4000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:4KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC52,.8SQ封装形状:SQUARE
封装形式:CHIP CARRIER并行/串行:PARALLEL
峰值回流温度(摄氏度):225电源:5 V
认证状态:Not Qualified座面最大高度:4.57 mm
最大待机电流:0.01 A最小待机电流:2 V
子类别:SRAMs最大压摆率:0.26 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:19.1262 mm
Base Number Matches:1

IDT71342LA25JI 数据手册

 浏览型号IDT71342LA25JI的Datasheet PDF文件第2页浏览型号IDT71342LA25JI的Datasheet PDF文件第3页浏览型号IDT71342LA25JI的Datasheet PDF文件第4页浏览型号IDT71342LA25JI的Datasheet PDF文件第5页浏览型号IDT71342LA25JI的Datasheet PDF文件第6页浏览型号IDT71342LA25JI的Datasheet PDF文件第7页 
HIGH SPEED  
IDT71342SA/LA  
4K X 8 DUAL-PORT  
STATIC RAM  
WITH SEMAPHORE  
Features  
High-speed access  
Fully asynchronous operation from either port  
Full on-chip hardware support of semaphore signalling be-  
tween ports  
Battery backup operation2V data retention (LA only)  
TTL-compatible; single 5V (±10%) power supply  
Available in plastic packages  
– Commercial:20/25/35/45/55/70ns(max.)  
Industrial:25/35/55ns(max.)  
Low-power operation  
IDT71342SA  
Active: 700mW (typ.)  
Standby: 5mW (typ.)  
IDT71342LA  
Industrial temperature range (–40°C to +85°C) is available  
for selected speeds  
Active: 700mW (typ.)  
Standby: 1mW (typ.)  
FunctionalBlockDiagram  
R/WR  
R/W  
L
CER  
CEL  
OER  
OEL  
I/O  
CONTROL  
I/O  
CONTROL  
I/O0R - I/O7R  
I/O0L- I/O7L  
MEMORY  
ARRAY  
SEMAPHORE  
LOGIC  
SEMR  
SEM  
L
ADDRESS  
DECODER  
ADDRESS  
DECODER  
A0R- A11R  
A0L- A11L  
2721 drw 01  
JANUARY 2001  
1
DSC 2621/12  
©2000IntegratedDeviceTechnology,Inc.  

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