Datasheet > IDT70V9099L12PFG

IDT70V9099L12PFG

更新时间： 2024-10-30 08:16:27

品牌	Logo	应用领域
艾迪悌 - IDT		静态存储器
页数	文件大小	规格书
17页	177K
描述
Dual-Port SRAM, 128KX8, 25ns, CMOS, PQFP100, 14 X 14 MM, 1.40 MM HEIGHT, GREEN, TQFP-100

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中文翻译

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数据手册

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IDT70V9099L12PFG 数据手册

HIGH-SPEED 3.3V

128K x9/x8

SYNCHRONOUS PIPELINED

DUAL-PORT STATIC RAM

IDT70V9199/099L

Features:

◆

Counter enable and reset features

True Dual-Ported memory cells which allow simultaneous

access of the same memory location

High-speed clock to data access

– Commercial:6/7.5/9/12ns(max.)

– Industrial:9ns (max.)

◆

Full synchronous operation on both ports

– 3.5ns setup to clock and 0ns hold on all control, data, and

addressinputs

– Data input, address, and control registers

– Fast 6.5ns clock to data out in the Pipelined output mode

– Self-timedwriteallowsfastcycletime

◆

Low-power operation

– IDT70V9199/099L

– 10ns cycle time, 100MHz operation in Pipelined output mode

LVTTL- compatible, single 3.3V (±0.3V) power supply

Industrial temperature range (–40°C to +85°C) is

available for selected speeds

Available in a 100-pin Thin Quad Flatpack (TQFP)

Green parts available, see ordering information

Active:500mW(typ.)

Standby: 1.5mW (typ.)

Flow-Through or Pipelined output mode on either port via

the FT/PIPE pins

Dual chip enables allow for depth expansion without

additional logic

◆

FunctionalBlockDiagram

R/W

OER

CE0R

CE1R

CE1⁰L^L

0/1

FT/PIPE

(1)

I/O0R - I/O8R

I/O0L - I/O8L

I/O

Control

I/O

Control

A16L

A16R

Counter/

Address

Reg.

Counter/

Address

Reg.

MEMORY

ARRAY

C⁰L^RK

CLK

ADS

CNTEN

ADS

CNTEN

CNTRST

4859 drw 01

NOTE:

1. I/O^0X- I/O7X for IDT70V9099.

JANUARY 2006

DSC-4859/4

12 3 4 5 6 7...17

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