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ICS87366AMLF PDF预览

ICS87366AMLF

更新时间: 2024-09-29 20:05:27
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
10页 93K
描述
PLL Based Clock Driver, 87366 Series, 6 True Output(s), 0 Inverted Output(s), PDSO24, 7.50 X 15.33 MM, 2.30 MM HEIGHT, MO-119, MS-013, SOIC-24

ICS87366AMLF 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:7.50 X 15.33 MM, 2.30 MM HEIGHT, MO-119, MS-013, SOIC-24针数:24
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.47系列:87366
输入调节:DIFFERENTIALJESD-30 代码:R-PDSO-G24
JESD-609代码:e3长度:15.525 mm
逻辑集成电路类型:PLL BASED CLOCK DRIVER功能数量:1
反相输出次数:端子数量:24
实输出次数:6最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:2.65 mm
最大供电电压 (Vsup):3.465 V最小供电电压 (Vsup):3.135 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:COMMERCIAL端子面层:MATTE TIN
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:7.5 mm最小 fmax:164.355 MHz
Base Number Matches:1

ICS87366AMLF 数据手册

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PRELIMINARY  
ICS87366  
Integrated  
Circuit  
Systems, Incꢀ  
1-TO-6, DIFFERENTIAL TO 3.3V LVPECL  
CLOCK  
G
ENERATOR W/FORWARD  
E
RROR  
CORRECTION  
GENERAL DESCRIPTION  
FEATURES  
The ICS87366 is a 1-to-6, Differential to 3.3V 6 differential LVPECL outputs  
,&6  
LVPECL Clock Generator and a member of the  
1 differential CLK/nCLK input pair  
HiPerClockS™  
HiPerClockS™ family of High Performance Clock  
Solutions from ICS. The ICS87366 can multiply the  
reference clock times 3 or multiply times 3 * 66/64  
CLK/nCLK pair can accept the following differential input  
levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL  
thereby applying an FEC rate to the reference clock. The  
ICS87366 is an ideal device in any application requiring x3  
multiplication with an 66/64 FEC option while maintaining low  
jitter. Common applications may include networking and stor-  
age area networks.  
Output frequency: FEC_SEL = 0, 159.375MHz  
FEC_SEL = 1, 164.355MHz  
Cycle-to-cycle jitter: FEC_SEL = 0, 15ps (typical)  
FEC_SEL = 1, 20ps (typical)  
Full 3.3V or 3.3V core/2.5V output supply voltage  
0°C to 70°C ambient operating temperature  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
Q0  
nQ0  
Q0  
nQ0  
Q1  
nQ1  
Q2  
nQ2  
Q3  
nQ3  
Q4  
1
2
3
4
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
VCCO  
FEC_SEL  
nc  
MR  
CLK  
nCLK  
VEE  
VCCA  
VCC  
Q1  
nQ1  
Q2  
PLL_SEL  
5
6
0
nQ2  
Q3  
CLK  
nCLK  
Output  
Divider  
0
1
7
1
nQ3  
Q4  
8
9
10  
11  
12  
PLL  
Input  
Divider  
nQ4  
Q5  
nQ5  
PLL_SEL  
VEE  
VCCO  
nQ4  
Q5  
0
1
Feedback  
Divider  
nQ5  
ICS87366  
24-Lead, 300-MIL SOIC  
7.5mm x 15.33mm x 2.3mm body package  
M Package  
FEC_SEL  
MR  
Top View  
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial  
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.  
87366AM  
www.icst.com/products/hiperclocks.html  
REV. A SEPTEMBER 9, 2003  
1

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