Datasheet > ICS873990AYT

ICS873990AYT

更新时间： 2024-09-29 04:44:23

品牌	Logo	应用领域
矽成 - ICSI		晶体时钟发生器外围集成电路
页数	文件大小	规格书
16页	158K
描述
LOW VOLTAGE, LVCMOS/ CRYSTAL-TO-LVPECL/ECL CLOCK GENERATOR

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ICS873990AYT 数据手册

ICS873990

LOW VOLTAGE, LVCMOS/

CRYSTAL-TO-LVPECL/ECL CLOCK GENERATOR

Integrated

Circuit

Systems, Inc.

FEATURES

GENERAL DESCRIPTION

• 14 differential LVPECL outputs

The ICS873990 is a low voltage, low skew, 3.3V

ICS

LVPECL/ECL Clock Generator and a member

of the HiPerClockS™family of High Performance

• Selectable crystal oscillator interface or TEST_CLK inputs

HiPerClockS™

Clock Solutions from ICS. The ICS873990 has • TEST_CLK accepts the following input levels:

two selectable clock inputs. The XTAL1 and

LVCMOS, LVTTL

XTAL2 are used to interface to a crystal and the TEST_CLK

pin can accept a LVCMOS or LVTTL input. This device has a

fully integrated PLL along with frequency configurable out-

puts. An external feedback input and output regenerates

clocks with “zero delay”.

• Output frequency: 400MHz (maximum)

• Crystal input frequency range: 10MHz to 25MHz

• VCO range: 200MHz to 800MHz

• Output skew: 250ps (maximum)

• Cycle-to-cyle jitter: 50ps (typical)

The four independent banks of outputs each have their own

output dividers, which allow the device to generate a multi-

tude of different bank frequency ratios and output-to-input

frequency ratios. The output frequency range is 25MHz to

400MHz and the input frequency range is 6.25MHz to

125MHz.The PLL_SEL input can be used to bypass the PLL

for test and system debug purposes. In bypass mode, the

input clock is routed around the PLL and into the internal out-

put dividers.

• LVPECL mode operating voltage supply range:

V_CC= 3.135V to 3.465V, V_EE= 0V

• ECL mode operating voltage supply range:

V_CC= 0V, V_EE= -3.465V to -3.135V

• 0°C to 70°C ambient operating temperature

• Industrial temperature available upon request

• Lead-Free package fully RoHS compliant

The ICS873990 also has a SYNC output which can be used

for system synchronization purposes. It monitors Bank A and

Bank C outputs for coincident rising edges and signals a pulse

per the timing diagrams in this data sheet.This feature is used

primarily in applications where Bank A and Bank C are run-

ning at different frequencies, and is particularly useful when

they are running at non-integer multiples of each other.

PIN ASSIGNMENT

Example Applications:

1. Line Card Multiplier: Multiply 19.44MHz from a back-plane

to 77.76MHz on the line card ASIC and Serdes.

39 38 37 36 35 34 33 32 31 30 29 28 27

nQB3

QB3

QC1

2. Zero Delay Buffer: Fan out up to thirteen 100MHz copies

from a reference clock to multiple processing units on an

embedded system.

nQC1

QC0

V^CCO

nQA0

nQC0

V^CCO

QD1

QA0

nQA1

QA1

ICS873990

nQD1

QD0

nQA2

QA2

nQD0

V^CCO

QFB

nQFB

V^CCA

nQA3

QA3

SYNC_SEL

VCO_SEL

7 8 9 10 11 12 13

52-Lead LQFP

10mm x 10mm x 1.4mm package body

Y package

TopView

873990AY

www.icst.com/products/hiperclocks.html

REV. B JUNE 13, 2005

12 3 4 5 6 7...16

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与ICS873990AYT相关器件

型号	品牌	获取价格	描述	数据表
ICS873991-147	IDT	获取价格	LOW VOLTAGE, LVCMOS/LVPECL-TO LVPECL/ECL CLOCK GENERATOR
ICS873991AY-147LF	IDT	获取价格	LOW VOLTAGE, LVCMOS/LVPECL-TO LVPECL/ECL CLOCK GENERATOR
ICS873991AY-147LFT	IDT	获取价格	LOW VOLTAGE, LVCMOS/LVPECL-TO LVPECL/ECL CLOCK GENERATOR
ICS873991AYLF	IDT	获取价格	PLL Based Clock Driver, 873991 Series, 13 True Output(s), 0 Inverted Output(s), PQFP52, 10
ICS873991AYLFT	IDT	获取价格	PLL Based Clock Driver, 873991 Series, 13 True Output(s), 0 Inverted Output(s), PQFP52, 10
ICS873991AYT	IDT	获取价格	PLL Based Clock Driver, 873991 Series, 13 True Output(s), 0 Inverted Output(s), PQFP52, 10
ICS873995AYLF	IDT	获取价格	PLL Based Clock Driver, 873995 Series, 6 True Output(s), 0 Inverted Output(s), PQFP48, 7 X
ICS873995AYLFT	IDT	获取价格	PLL Based Clock Driver, 873995 Series, 6 True Output(s), 0 Inverted Output(s), PQFP48, 7 X
ICS873996AY	IDT	获取价格	PLL Based Clock Driver, 873996 Series, 6 True Output(s), 0 Inverted Output(s), PQFP48, 7 X
ICS873996AYLF	IDT	获取价格	PLL Based Clock Driver, 873996 Series, 6 True Output(s), 0 Inverted Output(s), PQFP48, 7 X

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