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ICS844001AGILF PDF预览

ICS844001AGILF

更新时间: 2024-11-04 14:38:03
品牌 Logo 应用领域
艾迪悌 - IDT 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
13页 641K
描述
Clock Generator, 226.66MHz, PDSO8, 4.40 X 3 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-8

ICS844001AGILF 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:4.40 X 3 MM, 0.925 MM HEIGHT, GREEN, MO-153, TSSOP-8针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.82
Is Samacsys:N其他特性:ALSO OPERATES AT 3.3V SUPPLY
JESD-30 代码:R-PDSO-G8JESD-609代码:e3
长度:4.4 mm端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
最大输出时钟频率:226.66 MHz封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
主时钟/晶体标称频率:28.3 MHz认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压:2.625 V
最小供电电压:2.375 V标称供电电压:2.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHER
Base Number Matches:1

ICS844001AGILF 数据手册

 浏览型号ICS844001AGILF的Datasheet PDF文件第2页浏览型号ICS844001AGILF的Datasheet PDF文件第3页浏览型号ICS844001AGILF的Datasheet PDF文件第4页浏览型号ICS844001AGILF的Datasheet PDF文件第5页浏览型号ICS844001AGILF的Datasheet PDF文件第6页浏览型号ICS844001AGILF的Datasheet PDF文件第7页 
FEMTOCLOCKS™ CRYSTAL-TO-LVDS  
CLOCK GENERATOR  
ICS844001I  
GENERAL DESCRIPTION  
FEATURES  
The ICS844001I is a Fibre Channel Clock Generator  
One Differential LVDS output  
ICS  
HiPerClockS™  
and a member of the HiPerClocksTM family of high  
performance devices from IDT. The ICS844001I  
uses an 18pF parallel resonant crystal over the  
range of 20.4MHz - 28.3MHz. For Fibre Channel  
Crystal oscillator interface, 18pF parallel resonant crystal  
(20.4MHz - 28.3MHz)  
Output frequency range: 81.66MHz - 226.66MHz  
VCO range: 490MHz - 680MHz  
applications, a 26.5625MHz crystal is used. The frequency  
select pin allows the device to generate either 106.25MHz or  
212.5MHz from a 26.5625MHz crystal. To generate 187.5MHz  
for 12Gb Ethernet, a 23.4375MHz crystal is used. The  
ICS844001I uses IDT’s 3rd generation low phase noise VCO  
technology and can achieve <1ps typical rms phase jitter,  
easily meeting Fibre Channel and Ethernet jitter require-  
ments. The ICS844001I is packaged in a small 8-pin TSSOP,  
making it ideal for use in systems with limited board space.  
RMS phase jitter @ 106.25MHz, using a 26.5625MHz crystal  
(637kHz - 10MHz): 0.74ps (typical)  
3.3V or 2.5V operating supply  
-40°C to 85°C ambient operating temperature  
Available in both standard (RoHS 5) and lead-free (RoHS 6)  
packages  
COMMON CONFIGURATION TABLE - FIBRE CHANNEL, 12Gb ETHERNET  
Inputs  
Output Frequency  
Multiplication  
(MHz)  
Crystal Frequency (MHz) FREQ_SEL  
M
N
Value M/N  
26.5625  
26.5625  
23.4375  
1
0
0
24  
24  
24  
6
3
3
4
8
8
106.25  
212.5  
187.5  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
Pullup  
FREQ_SEL  
VDDA  
GND  
VDD  
1
2
3
4
8
7
6
5
Q
0
1
XTAL_OUT  
XTAL_IN  
nQ  
÷3  
÷6  
XTAL_IN  
Q
VCO  
FREQ_SEL  
Phase  
Detector  
OSC  
490MHz - 680MHz  
nQ  
XTAL_OUT  
ICS844001I  
8-Lead TSSOP  
4.40mm x 3.0mm x 0.925mm  
package body  
M = ÷24 (fixed)  
G Package  
Top View  
IDT/ ICSFEMTOCLOCKS™ CLOCK GENERATOR  
1
ICS844001I REV AAUGUST 29, 2006  

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