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ICS844002AGILF PDF预览

ICS844002AGILF

更新时间: 2024-10-01 08:39:43
品牌 Logo 应用领域
艾迪悌 - IDT 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
12页 221K
描述
Clock Generator, 226.66MHz, PDSO20, 6.50 X 4.40 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-20

ICS844002AGILF 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP,针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.79
其他特性:ALSO OPERATES AT 3.3V SUPPLYJESD-30 代码:R-PDSO-G20
JESD-609代码:e3长度:6.5 mm
湿度敏感等级:1端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
最大输出时钟频率:226.66 MHz封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
主时钟/晶体标称频率:28.33 MHz认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压:2.625 V
最小供电电压:2.375 V标称供电电压:2.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:4.4 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHER
Base Number Matches:1

ICS844002AGILF 数据手册

 浏览型号ICS844002AGILF的Datasheet PDF文件第2页浏览型号ICS844002AGILF的Datasheet PDF文件第3页浏览型号ICS844002AGILF的Datasheet PDF文件第4页浏览型号ICS844002AGILF的Datasheet PDF文件第5页浏览型号ICS844002AGILF的Datasheet PDF文件第6页浏览型号ICS844002AGILF的Datasheet PDF文件第7页 
PRELIMINARY  
ICS844002I  
FEMTOCLOCKS™ CRYSTAL-TO-  
LVDS FREQUENCY SYNTHESIZER  
Integrated  
Circuit  
Systems, Inc.  
GENERAL DESCRIPTION  
FEATURES  
The ICS844002I is a 2 output LVDS Synthesizer Two LVDS outputs  
optimized to generate Fibre Channel reference  
ICS  
• Selectable crystal oscillator interface  
or LVCMOS/LVTTL single-ended input  
HiPerClockS™  
clock frequencies and is a member of the  
HiPerClocksTM family of high performance clock  
solutions from ICS. Using a 26.5625MHz 18pF  
• Supports the following output frequencies: 212.5MHz,  
187.5MHz, 159.375MHz, 106.25MHz and 53.125MHz  
parallel resonant crystal, the following frequencies can be  
generated based on the 2 frequency select pins (F_SEL[1:0]):  
212.5MHz, 187.5MHz, 159.375MHz, 106.25MHz and  
53.125MHz. The ICS844002I uses ICS’ 3rd generation  
low phase noise VCO technology and can achieve <1ps  
typical rms phase jitter, easily meeting Fibre Channel jitter  
requirements. The ICS844002I is packaged in a small 20-pin  
TSSOP package.  
• VCO range: 560MHz - 680MHz  
• RMS phase jitter @ 212.5MHz, using a 26.5625MHz crystal  
(637kHz - 10MHz): 0.65ps (typical)  
• Full 3.3V or 2.5V supply modes  
• -40°C to 85°C ambient operating temperature  
• Available in both standard and lead-free RoHS compliant  
packages  
PIN ASSIGNMENT  
FREQUENCY SELECT FUNCTION TABLE  
nc  
VDDO  
Q0  
VDDO  
1
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
Inputs  
Q1  
nQ1  
GND  
VDD  
nXTAL_SEL  
REF_CLK  
XTAL_IN  
XTAL_OUT  
F_SEL1  
Output  
Frequency  
(MHz)  
2
3
4
5
6
7
8
9
Input  
M Divider N Divider M/N Divider  
Frequency F_SEL1 F_SEL0  
(MHz)  
nQ0  
MR  
nPLL_SEL  
nc  
VDDA  
F_SEL0  
VDD  
Value  
Value  
Value  
26.5625  
26.5625  
26.5625  
26.5625  
23.4375  
0
0
1
1
0
0
1
0
1
0
24  
24  
24  
24  
24  
3
4
8
6
4
2
8
212.5  
159.375  
106.25  
53.125  
187.5  
6
10  
12  
3
ICS844002I  
20-Lead TSSOP  
6.5mm x 4.4mm x 0.92mm  
package body  
G Package  
Top View  
BLOCK DIAGRAM  
Pulldown  
2
F_SEL[1:0]  
Pulldown  
nPLL_SEL  
Q0  
F_SEL[1:0]  
0 0 ÷3  
nQ0  
Pulldown  
REF_CLK  
1
0
1
0
0 1 ÷4  
26.5625MHz  
XTAL_IN  
1 0 ÷6  
VCO  
637.5MHz  
(w/26.5625MHz  
Reference)  
Q1  
1 1 ÷12  
Phase  
Detector  
OSC  
nQ1  
XTAL_OUT  
Pulldown  
nXTAL_SEL  
M = 24 (fixed)  
Pulldown  
MR  
The Preliminary Information presented herein represents a product in prototyping or pre-production.The noted characteristics are based on initial  
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.  
844002AGI  
www.icst.com/products/hiperclocks.html  
REV.A JANUARY 16, 2006  
1

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