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ICS844002 PDF预览

ICS844002

更新时间: 2024-11-04 04:58:15
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
16页 334K
描述
FEMTOCLOCKS⑩ CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER

ICS844002 数据手册

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FEMTOCLOCKS™ CRYSTAL-TO-LVDS  
FREQUENCY SYNTHESIZER  
ICS844002  
GENERAL DESCRIPTION  
FEATURES  
The ICS844002 is a 2 output LVDS Synthesizer  
Two LVDS outputs  
ICS  
HiPerClockS™  
optimized to generate Fibre Channel reference  
clock frequencies and is a member of the  
HiPerClocksTM family of high performance clock  
solutions from IDT. Using a 26.5625MHz 18pF  
• Selectable crystal oscillator interface  
or LVCMOS/LVTTL single-ended input  
• Supports the following output frequencies: 212.5MHz,  
187.5MHz, 159.375MHz, 106.25MHz and 53.125MHz  
parallel resonant crystal, the following frequencies can be  
generated based on the 2 frequency select pins (F_SEL[1:0]):  
212.5MHz, 187.5MHz, 159.375MHz, 106.25MHz and  
53.125MHz. The ICS844002 uses IDT’s 3rd generation low  
phase noise VCO technology and can achieve <1ps typical rms  
phase jitter, easily meeting Fibre Channel jitter requirements.  
The ICS844002 is packaged in a small 20-pin TSSOP package.  
• VCO range: 560MHz - 680MHz  
• RMS phase jitter @ 212.5MHz, using a 26.5625MHz crystal  
(637kHz - 10MHz): 0.65ps (typical)  
• Full 3.3V or 2.5V supply modes  
• 0°C to 70°C ambient operating temperature  
• Available in both standard (RoHS 5) and lead-free (RoHS 6)  
packages  
PIN ASSIGNMENT  
FREQUENCY SELECT FUNCTION TABLE  
nc  
VDDO  
Q0  
VDDO  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
Inputs  
Q1  
nQ1  
GND  
nc  
nXTAL_SEL  
REF_CLK  
XTAL_IN  
XTAL_OUT  
F_SEL1  
Output  
Frequency  
(MHz)  
Input  
M Divider N Divider M/N Divider  
Frequency F_SEL1 F_SEL0  
(MHz)  
nQ0  
MR  
nPLL_SEL  
nc  
VDDA  
F_SEL0  
VDD  
Value  
Value  
Value  
26.5625  
26.5625  
26.5625  
26.5625  
23.4375  
0
0
1
1
0
0
1
0
1
0
24  
24  
24  
24  
24  
3
4
8
6
4
2
8
212.5  
159.375  
106.25  
53.125  
187.5  
6
12  
3
ICS844002  
20-Lead TSSOP  
6.5mm x 4.4mm x 0.92mm  
package body  
G Package  
Top View  
BLOCK DIAGRAM  
Pulldown  
2
F_SEL[1:0]  
Pulldown  
nPLL_SEL  
Q0  
F_SEL[1:0]  
0 0 ÷3  
nQ0  
Pulldown  
REF_CLK  
1
0
1
0
0 1 ÷4  
26.5625MHz  
XTAL_IN  
1 0 ÷6  
VCO  
637.5MHz  
(w/26.5625MHz  
Reference)  
Q1  
1 1 ÷12  
Phase  
Detector  
OSC  
nQ1  
XTAL_OUT  
Pulldown  
nXTAL_SEL  
M = 24 (fixed)  
Pulldown  
MR  
IDT/ ICSLVDS FREQUENCY SYNTHESIZER  
1
ICS844002AG REV. A SEPTEMBER 28, 2007  

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