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ICS840S05AYIT PDF预览

ICS840S05AYIT

更新时间： 2024-11-02 20:06:31
品牌 Logo 应用领域
艾迪悌 - IDT 时钟外围集成电路晶体
页数 文件大小 规格书
13页 228K
描述
Clock Generator, 200MHz, PQFP32, 7 X 7 MM, 1MM HEIGHT, MS-026ABA-HD, TQFP-32

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中文翻译

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ICS840S05AYIT 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：QFP
包装说明：HTQFP,针数：32
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.25
JESD-30 代码：S-PQFP-G32JESD-609代码：e0
长度：7 mm端子数量：32
最高工作温度：85 °C最低工作温度：-40 °C
最大输出时钟频率：200 MHz封装主体材料：PLASTIC/EPOXY
封装代码：HTQFP封装形状：SQUARE
封装形式：FLATPACK, HEAT SINK/SLUG, THIN PROFILE峰值回流温度（摄氏度）：225
主时钟/晶体标称频率：25 MHz认证状态：Not Qualified
座面最大高度：1.2 mm最大供电电压：3.465 V
最小供电电压：3.135 V标称供电电压：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：TIN LEAD
端子形式：GULL WING端子节距：0.8 mm
端子位置：QUAD处于峰值回流温度下的最长时间：30
宽度：7 mmuPs/uCs/外围集成电路类型：CLOCK GENERATOR, OTHER
Base Number Matches：1

ICS840S05AYIT 数据手册

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PRELIMINARY  
CRYSTAL-TO-LVCMOS/LVTTL  
FRQUENCY SYNTHESIZER  
ICS840S05I  
GENERAL DESCRIPTION  
FEATURES  
• Four LVCMOS/LVTTL outputs,  
The ICS840S05I is a four output, Crystal or single  
ICS  
HiPerClockS™  
15Ω typical output impedance  
ended-to-LVCMOS/LVTTL Frequency Synthesizer  
and a member of HiperClocks™ family of high  
performance clock solutions from IDT. The  
ICS840S05I uses a 25MHz parallel resonant  
One REF_OUT LVCMOS/LVTTL clock output  
• Selectable crystal oscillator interface, 25MHz, 18pF parallel  
resonant crystal or LVCMOS/LVTTL single-ended reference  
input  
crystal to generate 33.33MHz – 166.67MHz clock signals,  
replacing solutions requiring multiple oscillator and fan-out  
buffer solution. The device supports output slew rate control  
with two slew select pins (SLEW[1:0]). The VCO operates at a  
frequency of 2GHz. The device has 2 output banks, Bank A  
with two 33.33MHz – 166.67MHz LVCMOS/LVTTL outputs and  
Bank B with two 33.33MHz – 166.67MHz LVCMOS/LVTTL  
outputs.  
• Supports the following output frequencies:  
Bank A/Bank B: 33.33MHz, 50MHz, 66.67MHz, 83.33MHz,  
100MHz, 125MHz, 133.33MHz, and 166.67MHz  
• VCO: 2GHz  
• Slew rate control  
• RMS period jitter: 10ps (typical)  
The two banks have their own dedicated frequency select pins  
and can be independently set for the frequencies mentioned  
above. The low phase noise characteristic of the ICS840S05I  
makes it an ideal clock source for Gigabit Ethernet application.  
Designed for networking and industrial applications, the  
ICS840S05I can also drive the high-speed clock inputs of  
communication processors, DSPs, switches and bridges.  
• Output supply modes:  
Core/Output  
3.3V/3.3V  
3.3V/2.5V  
• -40°C to 85°C ambient operating temperature  
• Available in both standard (RoHS 5) and lead-free (RoHS 6)  
packages  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
2
Pullup  
F_SELA[0, 2]  
32 31 30 29 28 27 26 25  
Pulldown  
QA0  
F_SELA1  
VDDA  
VDD  
GND  
QA0  
1
2
3
4
5
6
7
8
24  
23  
22  
21  
20  
19  
18  
17  
25MHz  
÷NA  
÷NB  
XTAL_IN  
XTAL_OUT  
XTAL_IN  
GND  
QA1  
QA1  
OSC  
0
1
VDDO_A  
GND  
QB0  
PLL  
VCO  
2GHz  
XTAL_OUT  
REF_SEL  
REF_IN  
F_SELB2  
QB0  
QB1  
Pulldown  
REF_IN  
QB1  
VDDO_B  
Pulldown  
REF_SEL  
9
10 11 12 13 14 15 16  
M = ÷80  
2
3
Pulldown  
Pulldown  
SLEW[1:0]  
MR/nOE  
ICS840S05I  
REF_OUT  
Pulldown  
Pullup  
F_SELB[2:0]  
nREF_OE  
32-Lead TQFP, E-Pad  
7mm x 7mm x 1.0mm package body  
Y package  
Top View  
The Preliminary Information presented herein represents a product in pre-production.The noted characteristics are based on initial product characterization  
and/or qualification.Integrated DeviceTechnology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.  
IDT™ / ICS™ LVCMOS/LVTTL FREQUENCY SYNTHESIZER  
1
ICS840S05AYI REV. A JULY 19, 2007  
1234567...13

中文翻译

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